Circuit device and oscillator
AssigneeSeiko Epson Corporation
InventorsYosuke Itasaka, Kohei Beppu, Naoki Ii
Life of this patent
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Abstract
A circuit device is configured to switching between a first mode in which phase noise of an output clock signal is lower than that in a second mode and the second mode in which power consumption is smaller than that in the first mode, and the circuit device includes an oscillation circuit configured to generate an oscillation signal, a waveform shaping circuit configured to perform waveform shaping on the oscillation signal to obtain a rectangular wave clock signal; and an output circuit configured to output the output clock signal based on the clock signal. A driving capability of the waveform shaping circuit in the first mode is higher than a driving capability of the waveform shaping circuit in the second mode.
Claims13
A circuit device configured to switch between a first mode in which phase noise of an output clock signal is lower than that in a second mode and the second mode in which power consumption is smaller than that in the first mode, the circuit device comprising:
- a power supply circuit configured to generate a first power supply voltage and a second power supply voltage, the first power supply voltage has a first voltage value and a second voltage value that is higher than the first voltage value, the second voltage value of the first power supply voltage being higher than a value of the second power supply voltage;
- an oscillation circuit configured to receive one of the first and second voltage values of the first power supply voltage and generate an oscillation signal;
- a waveform shaping circuit configured to receive the second power supply voltage and perform waveform shaping on the oscillation signal to obtain a rectangular wave clock signal;
- and
- an output circuit configured to output the output clock signal based on the clock signal, wherein
- the power supply circuit is further configured to supply the second voltage value of the first power supply voltage to the oscillation circuit to increase an amplitude of the oscillation signal which corresponds to the second voltage value, such that a transition period between a low level and a high level in the first mode is shortened than the second mode when performing the waveform shaping on the oscillation signal to obtain the rectangular wave clock signal.
An oscillator configured to switch between a first mode in which phase noise of an output clock signal is lower than that in a second mode and the second mode in which power consumption is smaller than that in the first mode, the oscillator comprising:
- a resonator;
- and
- a circuit device, wherein
- the circuit device includes:
- a power supply circuit configured to generate a first power supply voltage and a second power supply voltage, the first power supply voltage has a first voltage value and a second voltage value that is higher than the first voltage value, the second voltage value of the first power supply voltage being higher than a value of the second power supply voltage;
- an oscillation circuit configured to receive one of the first and second voltage values of the first power supply voltage and oscillate the resonator to generate an oscillation signal;
- a waveform shaping circuit configured to receive the second power supply voltage and perform waveform shaping on the oscillation signal to obtain a rectangular wave clock signal;
- and
- an output circuit configured to output the output clock signal based on the clock signal, and
- the power supply circuit is further configured to supply the second voltage value of the first power supply voltage to the oscillation circuit to increase an amplitude of the oscillation signal, which corresponds to the second voltage value, such that a transition period between a low level and a high level in the first mode is shortened than the second mode when performing the waveform shaping on the oscillation signal to obtain the rectangular wave clock signal.
A circuit device configured to switch between a first mode in which phase noise of an output clock signal is lower than that in a second mode and the second mode in which power consumption is smaller than that in the first mode, the circuit device comprising:
- a power supply circuit configured to generate a first power supply voltage and a second power supply voltage, the first power supply voltage has a first voltage value and a second voltage value that is higher than the first voltage value, the second voltage value of the first power supply voltage being higher than a value of the second power supply voltage;
- an oscillation circuit configured to receive one of the first and second voltage values of the first power supply voltage and generate an oscillation signal;
- a waveform shaping circuit configured to receive the second power supply voltage and perform waveform shaping on the oscillation signal to obtain a rectangular wave clock signal, the waveform shaping circuit including a buffer circuit;
- and
- an output circuit configured to output the output clock signal based on the clock signal, wherein
- the power supply circuit is further configured to supply the second voltage value of the first power supply voltage to the oscillation circuit to increase an amplitude of the oscillation signal, which corresponds to the second voltage value, such that a transition period between a low level and a high level in the first mode is shortened than the second mode when performing the waveform shaping on the oscillation signal to obtain the rectangular wave clock signal,
- the buffer circuit includes:
- a plurality of P-type transistors and a plurality of P-side switches in which each P-type transistor and each P-side switch are coupled in series between a power supply node and a coupling node;
- and
- a plurality of N-type transistors and a plurality of N-side switches in which each N-type transistor and each N-side switch are coupled in series between the coupling node and a GND node,
- a number of the P-side switches and the N-side switches that are turned on in the first mode is larger than a number of the P-side switches and the N-side switches that are turned on in the second mode, and
- resistances of the plurality of P-type transistors and the plurality of N-type transistors in the first mode are lower than resistances of the plurality of P-type transistors and the plurality of N-type transistors in the second mode.
Dependencies are inferred from the claim text.