Integration method for modularized silicon-based heterogeneous photoelectric integrated architecture

An integration method for a modularized silicon-based heterogeneous photoelectric integrated architecture, wherein the integration method is used for integrating a modularized silicon-based heterogeneous photoelectric integrated architecture and comprises the following steps:

• S1, integrating an ultra-low-loss material module, a high-frequency material module, and an integrated circuit module on a first silicon wafer;
• S2, preparing a laser material module on a second silicon wafer, and performing wafer-level bonding on the first silicon wafer and the second silicon wafer;
• S3, thinning a substrate on the first silicon wafer;
• S4, extracting a redistribution layer electrode at a bonding interface of a third silicon wafer containing the integrated circuit module and the first silicon wafer to form a first through silicon via;
• S5, forming a second through silicon via which is electrically connected to the metal electrode of a III-V laser device;
• S6, preparing micro-bumps on the first through silicon via and the second through silicon via for packaging with a printed circuit board, wherein
• the step S1 comprises:
• S11, selecting the first silicon wafer, and fabricating a passive optical device and a germanium device on top silicon of the first silicon wafer to obtain a silicon photonic module;
• S12, providing the ultra-low-loss material module on the silicon photonic module, wherein the ultra-low-loss material module comprises a SiN device formed on the first silicon wafer by etching after SiN deposition;
• S13, heterogeneously bonding a thin film lithium niobate on the first silicon wafer, and etching the thin film lithium niobate to form a thin film lithium niobate device;
• S14, providing a plurality of layers of metal and vias on the germanium device and the thin film lithium niobate device to form a metal electrode;
• and
• S15, performing wafer-level hybrid bonding on a third silicon wafer containing the integrated circuit module and the first silicon wafer, and removing a substrate of the first silicon wafer;
• the step S2 comprises:
• S21, fabricating a passive photonic device on the second silicon wafer;
• S22, providing a III-V group semiconductor epitaxial material on the second silicon wafer;
• S23, performing etching on the III-V group semiconductor epitaxial material to form a III-V laser device;
• and
• S24, fabricating a plurality of layers of metal and vias on the III-V laser device to form a metal electrode, wherein
• the step S22 comprises:
• heterogeneously bonding the III-V group semiconductor epitaxial material to the second silicon wafer by a wafer-to-wafer method or a chip-to-wafer method, wherein the III-V group semiconductor epitaxial material comprises an upper cladding layer, an active layer, and a lower cladding layer.