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AssigneeIntel Corporation
InventorsKuljit S. Bains, Jongwon Lee, Tomer Levy, Bill Nale, Amir Ali Radjai
Estimating the term…
Methods and apparatus for row hammer (RH) mitigation and recovery. A host comprising a memory controller is configured to interface with one or more DRAM devices, such as DRAM DIMMs. The memory controller includes host-side RH mitigation logic and the DRAM devices include DRAM-side RH mitigation logic that cooperates with the host-side RH mitigation logic to perform RH mitigation and/or recovery operations in response to detection of RH attacks. The memory controller and DRAM device are configured to support an RH polling mode under which the memory controller periodically polls for RH attack detection indicia on the DRAM device that is toggled when the DRAM device detects an RH attack. The memory controller and DRAM device may also be configured to support an RH ALERT_n mode under which the use of an ALERT_n signal and pin is used to provide an alert to the memory controller to initiate RH mitigation and/or recovery.
A host apparatus comprising a memory controller configured to control a Dynamic Random Access Memory (DRAM) device having a plurality of memory cells arranged in rows and columns, comprising:
A Dynamic Random Access Memory (DRAM) device, comprising:
A system comprising:
Dependencies are inferred from the claim text.