Memory controller management techniques for managing data transfer for memory access operations

A method comprising:

• managing, by a processor of a computing device, data transfer between a cache memory and a high-bandwidth memory for memory access operations directed to the high-bandwidth memory;
• facilitating a timer associated with a memory controller to serve as a watchdog timer to track memory accesses to allow high priority memory accesses to execute while delaying low priority memory accesses, wherein the high priority memory accesses are allowed or the low priority memory accesses are delayed based on whether a number of transactions have reached the threshold;
• and
• automatically close a page in the cache memory in response to a determination that a number of transactions to the page has reached the threshold, wherein the page is allowed to remain open when the number of transactions executed to the page are less than the threshold, and wherein the threshold is reduced or increased in response to increased loads on the cache memory or decreased loads on the cache memory, respectively.

At least one non-transitory computer-readable medium having stored thereon instructions which, when executed, cause a computing device to perform operations comprising:

• managing data transfer between a cache memory and a high-bandwidth memory for memory access operations directed to the high-bandwidth memory;
• facilitating a timer associated with a memory controller to serve as a watchdog timer to track memory accesses to allow high priority memory accesses to execute while delaying low priority memory accesses, wherein the high priority memory accesses are allowed or the low priority memory accesses are delayed based on whether a number of transactions have reached the threshold;
• and
• automatically close a page in the cache memory in response to a determination that a number of transactions to the page has reached the threshold, wherein the page is allowed to remain open when the number of transactions executed to the page are less than the threshold, and wherein the threshold is reduced or increased in response to increased loads on the cache memory or decreased loads on the cache memory, respectively.