I/O unit
AssigneeFanuc Corporation
InventorsMasahiro Saeki, Shinichi Kuwahata
Life of this patent
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Abstract
An I/O unit comprises: two front-stage terminals; a slave processing circuit; two rear-stage terminals; and a selection circuit for selecting whether to connect the front-stage terminal and the rear-stage terminal, and the front-stage terminal and the rear-stage terminal, or to connect the front-stage terminal and the rear-stage terminal, and the front-stage terminal and the rear-stage terminal. The selection circuit connects to the rear-stage terminal via the slave processing circuit.
Claims1
An I/O unit that connects a master unit and a device and transmits a signal between the master unit and the device, wherein the master unit includes a first master processing circuit and a second master processing circuit, the I/O unit comprising:
- a first preceding-stage terminal and a second preceding-stage terminal configured to be connected to the master unit or another I/O unit provided in a preceding stage of the I/O unit;
- a first subsequent-stage terminal and a second subsequent-stage terminal configured to be connected to another I/O unit provided in a subsequent stage of the I/O unit;
- a switching element configured to be operated by an operator;
- a selection circuit configured to switch, in response to an operation of the switching element by the operator, between a first connection state in which the first master processing circuit is connected to the first subsequent-stage terminal via the first preceding-stage terminal and the second master processing circuit is connected to the second subsequent-stage terminal via the second preceding-stage terminal and a second connection state in which the first master processing circuit is connected to the second subsequent-stage terminal via the first preceding-stage terminal and the second master processing circuit is connected to the first subsequent-stage terminal via the second preceding-stage terminal;
- and
- a slave processing circuit configured to perform input and output of a signal with respect to the first master processing circuit or the second master processing circuit,
- wherein one of the first preceding-stage terminal or the second preceding-stage terminal or one of the first subsequent-stage terminal or the second subsequent-stage terminal is connected to the selection circuit via the slave processing circuit,
- the first master processing circuit and the second master processing circuit are connected in parallel via the first preceding-stage terminal and the second preceding-stage terminal.
Dependencies are inferred from the claim text.