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US 12,561,244 B2Granted
Hybrid memory
AssigneeRambus Inc.
InventorFrederick A. Ware
Life of this patent
Estimating the term…
Abstract
A hybrid memory includes cache of relatively fast and durable dynamic, random-access memory (DRAM) in service of a larger amount of relatively slow and wear-sensitive flash memory. An address buffer on the module maintains a static random-access memory (SRAM) cache of addresses for data cached in DRAM.
Claims19
A hybrid memory comprising:
- nonvolatile memory defining nonvolatile address space, the nonvolatile address space to store information at nonvolatile-memory addresses;
- volatile memory defining volatile address space and write-back buffer space, the volatile address space to cache entries of the information stored in the nonvolatile address space with first address tags corresponding to the nonvolatile-memory addresses of the information;
- and
- an address buffer to cache second address tags corresponding to the entries cached in the volatile address space and aggregate dirty ones of the entries into the write-back buffer space.
1 more element
A method for caching information from nonvolatile memory, the information organized as entries stored at nonvolatile-memory addresses, the method comprising:
- copying the entries from the nonvolatile-memory addresses to volatile-memory addresses in a dynamic random-access memory;
- storing, in the dynamic random-access memory, a first address tag with each of the entries copied to one of the volatile-memory addresses in the dynamic random-access memory;
- and
- caching, in a static random-access memory of an address buffer, a second address tag corresponding to a first subset of the entries stored in the volatile-memory addresses in the dynamic random-access memory;
- marking as dirty a second subset of the entries stored in the volatile-memory addresses in the dynamic random-access memory;
- and
- aggregating the second subset of the entries in a write-back buffer space.
4 more elements
A hybrid memory comprising:
- nonvolatile memory defining nonvolatile address space, the nonvolatile address space to store information at nonvolatile-memory addresses;
- volatile memory defining volatile address space and write-back buffer space, the volatile address space to cache entries of the information stored in the nonvolatile address space with first address tags corresponding to the nonvolatile-memory addresses of the information;
- and
- means for caching second address tags corresponding to the information cached in the volatile address space and aggregating dirty ones of the entries into the write-back buffer space.
1 more element
Dependencies are inferred from the claim text.