Parallel processing of a Softmax operation by dividing an input vector into a plurality of fragments
AssigneeGraphcore Limited
InventorsCarlo Luschi, Godfrey Da Costa, Badreddine Noune
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AssigneeGraphcore Limited
InventorsCarlo Luschi, Godfrey Da Costa, Badreddine Noune
Estimating the term…
A computer comprising a plurality of processing units, each processing unit having an execution unit and access to computer memory which stores code executable by the execution unit and input values of an input vector to be processed by the code, the code, when executed, configured to access the computer memory to obtain multiple pairs of input values of the input vector, determine a maximum or corrected maximum input value of each pair as a maximum result element, determine and store in a computer memory a maximum or corrected maximum result of each pair of maximum result elements as an approximation to the natural log of the sum of the exponents of the input values and access the computer memory to obtain each input value and apply it to the maximum or corrected maximum result to generate each output value of a Softmax output vector.
A computer-implemented method of executing a neural network by processing an input vector comprising a plurality of input values, the method implemented in a hardware processor comprising a plurality of processing units on a single chip, each processing unit comprising an execution unit and having access to computer memory, wherein each processing unit is associated with and has access to its own computer memory which is not shared by others of the processing units, wherein the computer memory of each processing unit stores code executable by the execution unit of that processing unit, wherein the input vector is divided into a plurality of fragments, wherein there are no dependencies among any of the plurality of fragments, and wherein each processing unit further comprises a respective plurality of registers, the method comprising:
A computer program embodied on non-transitory computer-readable storage, the program comprising code configured so as when run on a hardware processor comprising a plurality of processing units on a single chip, each processing unit comprising an execution unit and having access to computer memory, wherein each processing unit is associated with and has access to its own computer memory which is not shared by others of the processing units, wherein the computer memory of each processing unit stores the code executable by the execution unit of that processing unit, wherein an input vector is divided into a plurality of fragments, wherein there are no dependencies among any of the plurality of fragments, and wherein each processing unit further comprises a respective plurality of registers, the hardware processor performs a method of executing a neural network by processing the input vector comprising a plurality of input values by performing operations including:
A computer configured to execute a neural network comprising a layer, the computer comprising:
Dependencies are inferred from the claim text.