Semiconductor devices
AssigneeSamsung Electronics Co., Ltd.
InventorsDayoung Lee, Jun-Woo Lee, Sungdong Cho
Life of this patent
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Abstract
A semiconductor device includes a lower structure including a substrate and a cell structure on the substrate and a plurality of interconnection layers, which are stacked on the lower structure in a first direction extending perpendicular to a top surface of the substrate. An uppermost interconnection layer of the plurality of interconnection layers includes uppermost conductive lines. Each of the uppermost conductive lines includes a lower metal compound pattern, a metal pattern, an upper metal compound pattern, and a capping pattern, which are sequentially stacked in the first direction. The lower metal compound pattern, the metal pattern, and the upper metal compound pattern include a same metallic element.
Claims15
A semiconductor device, comprising:
- a lower structure including a substrate and a cell structure on the substrate;
- and
- a plurality of interconnection layers, which are stacked on the lower structure in a first direction that extends perpendicular to a top surface of the substrate,
- wherein an uppermost interconnection layer of the plurality of interconnection layers includes:
- an uppermost interlayer insulating layer,
- uppermost conductive lines horizontally spaced apart from each other on the uppermost interlayer insulating layer, and
- a passivation layer covering the uppermost interlayer insulating layer and the uppermost conductive lines and comprising a hydrogen-containing insulating material,
- wherein each of the uppermost conductive lines includes a lower metal compound pattern, a metal pattern, an upper metal compound pattern, and a capping pattern, which are sequentially stacked in the first direction,
- wherein the lower metal compound pattern, the metal pattern, and the upper metal compound pattern include a same metallic element, and
- wherein the passivation layer covers top and side surfaces of the uppermost conductive lines.
A semiconductor device, comprising:
- a conductive line on a substrate;
- and
- a passivation layer on the substrate such that the passivation layer covers top and side surfaces of the conductive line,
- wherein the conductive line includes a lower metal pattern, a lower metal compound pattern, a metal pattern, an upper metal compound pattern, an upper metal pattern and a capping pattern, which are sequentially stacked in a first direction perpendicular that extends to a top surface of the substrate,
- wherein the metal pattern includes aluminum,
- wherein each of the lower and upper metal compound patterns includes a metal compound, the metal compound containing aluminum and an additional metallic element, and
- wherein the lower and upper metal compound patterns have a lower resistivity than that of the lower and upper metal patterns.
Dependencies are inferred from the claim text.