Conductive feature formation and structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Wei Chang, Min-Hsiu Hung, Hung-Yi Huang, Chun Chieh Wang, Yu-Ting Lin
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Abstract
Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- forming a source/drain region adjacent to a gate stack;
- and
- forming a silicide region simultaneously with forming a barrier layer directly over the source/drain region, the forming the silicide region and the forming the barrier layer being done with a single combination of chemicals flowed at a same time.
A method of manufacturing a semiconductor device, the method comprising:
- forming a gate stack over a substrate;
- forming a first source/drain region and a second source/drain region on opposite sides of the gate stack;
- and
- forming contacts to the first source/drain region and the second source/drain region, the forming the contacts comprising:
- exposing the first source/drain region and the second source/drain region;
- and
- depositing a barrier layer directly over the first source/drain region and the second source/drain region with a first set of chemicals, the first set of chemicals being introduced simultaneously with each other, wherein the first set of chemicals will also react with a material of the first source/drain region to form a silicide material.
A method of manufacturing a semiconductor device, the method comprising:
- preparing a first precursor;
- preparing a second precursor;
- and
- simultaneously flowing the first precursor and the second precursor over a semiconductor substrate, wherein the first precursor and the second precursor work together to form a barrier layer on a dielectric material and a silicide on a source/drain region adjacent to a gate stack.
Dependencies are inferred from the claim text.