Semiconductor device having cut gate dielectric
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChang-Yun Chang, Bone-Fong Wu, Ming-Chang Wen, Ya-Hsiu Lin
Life of this patent
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Abstract
A device includes a semiconductor fin, a gate structure, gate spacers, and a dielectric feature. The semiconductor fin is over a substrate. The gate structure is over the semiconductor fin and includes a gate dielectric layer over the semiconductor fin and a gate metal covering the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The dielectric feature is over the substrate. The dielectric feature is in contact with the gate metal, the gate dielectric layer, and the gate spacers, and an interface between the gate metal and the dielectric feature is substantially aligned with an interface between the dielectric feature and one of the gate spacers.
Claims20
A device comprising:
- a first fin and a second fin over a substrate and extending in a first direction;
- a gate structure crossing the first and second fins and extending in a second direction different from the first direction;
- a first source/drain feature over the first fin;
- a second source/drain feature over the second fin;
- an interlayer dielectric (ILD) layer covering the first and second source/drain features;
- and
- a dielectric feature over the substrate and extending in the first direction, wherein the dielectric feature is disposed between and in contact with the first and second source/drain features, and wherein the dielectric feature comprises:
- a first dielectric layer;
- and
- a second dielectric layer over the first dielectric layer, wherein from a top view, the first dielectric layer extends lengthwise along the first direction, the dielectric feature interfaces with the first source/drain feature and the second source/drain feature by the first dielectric layer, the dielectric feature interfaces with the gate structure by the second dielectric layer.
A device, comprising:
- first fins protruding from a substrate;
- second fins protruding from the substrate;
- shallow trench isolation (STI) regions between the first fins and between the second fins;
- a first source/drain feature wrapping the first fins;
- a second source/drain feature wrapping the second fins;
- a dielectric feature laterally between the first source/drain feature and the second source/drain feature, wherein the dielectric feature has opposite sidewalls interfacing with the first source/drain feature and the second source/drain feature, respectively;
- a gate structure across the first fins and the second fins, wherein the dielectric feature separates the gate structure, and wherein:
- the dielectric feature comprises a first dielectric layer and a second dielectric layer over the first dielectric layer, the dielectric feature interfaces with the first source/drain feature and the second source/drain feature by the first dielectric layer, the dielectric feature interfaces with the gate structure by the second dielectric layer;
- and
- an interlayer dielectric (ILD) layer over the first source/drain feature and the second source/drain feature.
A device, comprising:
- a first fin protruding from a substrate;
- a second fin protruding from the substrate;
- a first source/drain feature surrounding the first fin;
- a second source/drain feature surrounding the second fin;
- an interlayer dielectric (ILD) layer covering the first and second source/drain features;
- a dielectric feature over the substrate, wherein the dielectric feature, the first fin and the second fin extend in the same direction, and the first source/drain feature has a first sidewall abutting the dielectric feature and a second sidewall inclined with respect to the first sidewall, the second source/drain feature has a third sidewall abutting the dielectric feature and a fourth sidewall inclined with respect to the third sidewall, the dielectric feature comprises:
- a silicon nitride layer on the substrate;
- and
- a silicon oxide layer on the silicon nitride layer, the silicon nitride layer of the dielectric feature is laterally between the silicon oxide layer of the dielectric feature and the first source/drain feature;
- a first gate structure across the first fin and the second fin;
- and
- a second gate structure disposed adjacent to the first gate structure and across the first fin and the second fin, wherein the dielectric feature cuts through the first gate structure and the second gate structure.
Dependencies are inferred from the claim text.