Zero clearance backdrilled printed circuit boards
AssigneeNokia Solutions and Networks Oy
InventorsPaul Brown, Alex Chan, Daniel Anav, Jonathan Montag
Life of this patent
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AssigneeNokia Solutions and Networks Oy
InventorsPaul Brown, Alex Chan, Daniel Anav, Jonathan Montag
Estimating the term…
A multi-layer printed circuit board (PCB), includes a first plurality of layers, each having a plurality of signal traces disposed thereon, a second plurality of layers, each having a voltage plane disposed thereon, and a plurality of plated-through-hole vias disposed between a first surface of the multi-layer PCB and a second surface of the multi-layer PCB, wherein each plated-through-hole via includes a conductive barrel, wherein a first layer of the first plurality of layers includes a backdrill clearance region around a first plated-through-hole via in which no signal traces are disposed, and a first voltage plane on a first layer of the second plurality of layers is in contact with the conductive barrel of the first plated-through-hole via. In various embodiments, portions of the barrel of a plated-through-hole via are removed by, for example, backdrilling. Various embodiments advantageously provide improvements to signal-to-reference overlap, and to power plane current-carrying capacity.
A multi-layer printed circuit board (PCB), comprising:
A multi-layer printed circuit board (PCB), comprising:
A method, comprising:
Dependencies are inferred from the claim text.