Systems, apparatus, and methods to improve webservers using dynamic load balancers

An apparatus comprising:

• interface circuitry;
• instructions;
• and
• programmable circuitry to operate based on the instructions to:
• select first circuitry of the programmable circuitry based on a proximity order of the first circuitry to at least one of a first core or a second core of the programmable circuitry, the first circuitry separate from the first core and the second core;
• enqueue first event data associated with a first data object in a first queue in the first circuitry and enqueue second event data associated with a second data object in a second queue in the first circuitry, the first data object and the second data object associated with a request for media;
• dequeue the first event data into a third queue and dequeue the second event data into a fourth queue, the third queue associated with the first core, the fourth queue associated with the second core;
• and
• cause the first core to execute a first computing operation based on the first event data in the third queue and cause the second core to execute a second computing operation based on the second event data in the fourth queue.

At least one non-transitory computer readable medium comprising instructions to cause programmable circuitry to at least:

• select first circuitry of the programmable circuitry based on a proximity order of the first circuitry to at least one of a first core or a second core of the programmable circuitry, the first circuitry separate from the first core and the second core;
• enqueue first event data associated with a first data object in a first queue in the first circuitry and enqueue second event data associated with a second data object in a second queue in the first circuitry, the first data object and the second data object associated with a request for media;
• dequeue the first event data into a third queue and dequeue the second event data into a fourth queue, the third queue associated with the first core, the fourth queue associated with the second core;
• and
• cause the first core to execute a first computing operation based on the first event data in the third queue and cause the second core to execute a second computing operation based on the second event data in the fourth queue.