Shared control bus for graphics processors with intra-substrate and cross-substrate interfaces

A method, comprising:

• transmitting, by workload distribution circuitry via a shared workload distribution bus, control data that specifies graphics work distribution to graphics processors on different semiconductor substrates including a first graphics processor on a first semiconductor substrate and a second graphics processor on a second semiconductor substrate, wherein the first and second semiconductor substrates are packaged in a multi-chip module, wherein:
• the control data is distinct from graphics data retrieved via respective memory interfaces and the graphics processors are also configured to transmit control information to the workload distribution circuitry via the shared workload distribution bus;
• and
• the transmitting is performed via both one or more intra-substrate interfaces between respective sub-units of the first graphics processor on the same semiconductor substrate and at least one cross-substrate interface between the different semiconductor substrates, wherein the at least one cross-substrate interface includes a smaller number of wires configured to transmit data in parallel than the one or more intra-substrate interfaces;
• splitting, by packet control circuitry, control data packets from at least one of the one or more intra-substrate interfaces for transmission as multiple packets via the cross-substrate interface;
• and
• retrieving, by the first and second graphics processors, the graphics data via one or more of respective memory interfaces and not via the shared workload distribution bus, based on the control data received via the shared workload distribution bus, wherein the control data specifies graphics work that operates on the graphics data;
• and
• executing by the first and second graphics processors, the graphics work specified by the control data to operate on the retrieved graphics data.

A non-transitory computer readable storage medium having stored thereon design information that specifies a design of at least a portion of a hardware integrated circuit in a format recognized by a semiconductor fabrication system that is configured to use the design information to produce the circuit according to the design, wherein the design information specifies that the circuit includes:

• a multi-chip module including a first graphics processor on a first semiconductor substrate and a second graphics processor on a second semiconductor substrate, wherein the first and second graphics processors are coupled to access graphics data via respective memory interfaces;
• a shared workload distribution bus that includes:
• one or more intra-substrate interfaces between respective sub-units of the first graphics processor on the first semiconductor substrate, wherein the one or more intra-substrate interfaces include a first number of wires configured to transmit data in parallel;
• and
• at least one cross-substrate interface between the first and second semiconductor substrates, wherein the at least one cross-substrate interface includes a second number of wires configured to transmit data in parallel, wherein the second number of wires is smaller than the first number of wires;
• workload distribution circuitry configured to transmit, via the shared workload distribution bus, control data that specifies graphics work for distribution to the first and second graphics processors, wherein the control data is distinct from the graphics data and the first and second graphics processors are also configured to transmit second control data to the workload distribution circuitry via the shared workload distribution bus;
• and
• packet control circuitry configured to split a control data packet from at least one of the one or more intra-substrate interfaces for transmission as multiple packets via the cross-substrate interface;
• wherein the first and second graphics processors are configured to:
• retrieve the graphics data via one or more of the respective memory interfaces and not via the shared workload distribution bus, based on the control data received via the shared workload distribution bus, wherein the control data specifies graphics work that operates on the graphics data;
• and
• execute the graphics work specified by the control data to operate on the retrieved graphics data.