Integrated circuit packages and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Hung Lin, Jih-Churng Twu, Su-Chun Yang, Shih-Peng Tai, Yu-Hao Kuo
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Hung Lin, Jih-Churng Twu, Su-Chun Yang, Shih-Peng Tai, Yu-Hao Kuo
Estimating the term…
A method includes bonding a first semiconductor die and a second semiconductor die to a substrate, where a gap is disposed between a first sidewall of the first semiconductor die and a second sidewall of the second semiconductor die, performing a plasma treatment to dope top surfaces and sidewalls of each of the first semiconductor die and the second semiconductor die with a first dopant, where a concentration of the first dopant in the first sidewall decreases in a vertical direction from a top surface of the first semiconductor die towards a bottom surface of the first semiconductor die, and a concentration of the first dopant in the second sidewall decreases in a vertical direction from a top surface of the second semiconductor die towards a bottom surface of the second semiconductor die, and filling the gap with a spin-on dielectric material.
A method comprising:
A method comprising:
A package comprising:
Dependencies are inferred from the claim text.