Wafer-level die singulation using buried sacrificial structure

A method for fabricating a semiconductor wafer having a buried sacrificial structure, the method comprising:

• forming a plurality of trenches in a wafer substrate, each one of the plurality of trenches having a bottom surface and a sidewall circumferentially connected to the bottom surface;
• forming an oxygen-implanted layer in each one of the plurality of trenches;
• forming a first silicon epitaxial layer on the oxygen-implanted layer to fill a portion of the trench;
• performing an annealing process to convert the oxygen-implanted layer to a buried sacrificial structure, the buried sacrificial structure having a bottom portion disposed on the bottom surface of the trench and a side portion circumferentially connected to the bottom portion and disposed on the sidewall of the trench;
• forming a second silicon epitaxial layer on the buried sacrificial structure to fill a remaining portion of the trench, wherein the first silicon epitaxial layer and the second silicon epitaxial layer form a die substrate surrounded by the buried sacrificial structure;
• and
• performing a chemical-mechanical planarization (CMP) process to form substantially flat top surfaces of the die substrate and the side portion of the buried sacrificial structure.

A method, comprising:

• providing a semiconductor wafer, the semiconductor wafer having a plurality of die regions separated by a die spacing region and comprising:
• a wafer substrate;
• a plurality of dies corresponding to the plurality of die regions and disposed over the wafer substrate, each die located in the corresponding die region and comprising:
• a die substrate extending vertically from a top surface to a bottom surface and comprising a sidewall circumferentially connecting the top surface and the bottom surface;
• and
• an integrated circuit (IC) device disposed in the die substrate;
• a plurality of buried sacrificial structures corresponding to the plurality of dies, each buried sacrificial structure embedded in the wafer substrate and disposed between the corresponding die and the wafer substrate and further comprising:
• a bottom portion located in the die region;
• and
• a side portion circumferentially connected to the bottom portion, the side portion located in the die spacing region and surrounding the sidewall of the corresponding die substrate,
• forming a plurality of dicing trenches, each dicing trench located in the die spacing region surrounding the corresponding die, wherein the dicing trench extends vertically from a top open end to a bottom open end and horizontally from an inner sidewall to an outer side wall, the bottom open end is circumferentially connected to the side portion of the buried sacrificial structure;
• attaching the wafer substrate to a pre-etch handle;
• and
• performing an etching process to remove the plurality of buried sacrificial structures to form a plurality of subsurface voids, wherein each subsurface void and the corresponding dicing trench connected to the subsurface void form a continuous dicing void that separates the corresponding die from the wafer substrate.