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US 12,550,384 B2Granted
Memory devices
AssigneeGlobalFoundries U.S. Inc.
InventorsAnupam Dutta, Partha S. Gupta
Life of this patent
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Abstract
The present disclosure relates to semiconductor structures and, more particularly, to memory devices and methods of manufacture. The structure includes: a gate structure having a gate dielectric material and a gate body; a body region under the gate dielectric material; a first doped region laterally adjacent to a first side of the body region; a second doped region laterally adjacent to the first doped region; and a shallow trench isolation structure laterally adjacent to a second side of the body region.
Claims18
A structure comprising:
- a gate structure comprising a gate dielectric material and a gate body;
- a body region under the gate dielectric material;
- a first doped region laterally adjacent to a first side of the body region;
- a second doped region laterally adjacent to the first doped region;
- a shallow trench isolation structure laterally adjacent to a second side of the body region;
- and
- a body contact on an opposing side of the shallow trench isolation structure and in electrical connection with the body region.
4 more elements
A structure comprising:
- a semiconductor layer;
- a gate structure over the semiconductor layer;
- a floating body region in the semiconductor layer and under the gate structure;
- a body contact electrically connecting to the floating body region;
- a shallow trench isolation structure between the body contact and the floating body region;
- an N− region laterally adjacent to the body region;
- and
- an N+ region laterally adjacent to the N− region and spaced away from the floating body region.
5 more elements
Dependencies are inferred from the claim text.