Electronic device and operation method therefor
AssigneeSK hynix Inc.
InventorShao Chun Kan
Life of this patent
Estimating the term…
Abstract
Electronic device and operation method therefor are provided. The electronic device is operable to communicate with another electronic device. The operation method comprises the following operations. A forward error correction (FEC) frame to be transmitted via a plurality of active lanes of a link is obtained, wherein the FEC frame includes a data block, an error detection block associated with the data block, and an error correction block associated with the data block and the error detection block. The FEC frame is distributed over the lanes of the link in one of a plurality of different lane distribution orders selectively based on number of active lanes included in the plurality of active lanes. The FEC frame is transmitted over the plurality of lanes of the link to another electronic device.
Claims16
A method performed by an electronic device, the method comprising:
- obtaining a forward error correction (FEC) frame including a data block, an error detection block associated with the data block, and an error correction block associated with the data block and the error detection block;
- distributing the FEC frame over a plurality of lanes of the link in one of a plurality of different lane distribution orders selectively based on a number of active lanes included in the plurality of active lanes;
- and
- transmitting the FEC frame over the plurality of lanes of the link to a second electronic device;
- wherein:
- a first lane distribution order of the plurality of different lane distribution orders is utilized when the number of active lanes is a first number;
- a second lane distribution order of the plurality of different lane distribution orders is utilized when the number of active lanes is a second number;
- and
- wherein the first lane distribution order is different from the second lane distribution order.
An electronic device comprising:
- an interconnection controller including:
- a physical layer circuit for signal transmission;
- and
- a link controller for data transmission, coupled to the physical layer circuit, wherein the interconnection controller is configured to perform:
- generating a forward error correction (FEC) frame including a data block, an error detection block associated with the data block, and an error correction block associated with the data block and the error detection block;
- distributing the FEC frame over a plurality of lanes of the link in one of a plurality of different lane distribution orders selectively based on a number of active lanes included in the plurality of active lanes;
- and
- transmitting the FEC frame over the plurality of lanes of the link to a second electronic device;
- wherein:
- a first lane distribution order of the plurality of different lane distribution orders is utilized when the number of active lanes is a first number;
- a second lane distribution order of the plurality of different lane distribution orders is utilized when the number of active lanes is a second number;
- and
- wherein the first lane distribution order is different from the second lane distribution order.
Dependencies are inferred from the claim text.