System and method for low density parity check (LDPC) code with 3/4 code rate

An apparatus comprising:

• a transmitter and baseband circuitry, wherein the baseband circuitry is configured to:
• identify, according to a code rate of 3/4 and a code block size of 3888 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code, the first binary parity check matrix corresponding to a first exponent matrix having 144 values;
• encode, using an encoder of the baseband circuitry, data using the first binary parity check matrix;
• and
• transmit, using a transmitter, the encoded data over a wireless channel,
• wherein the first exponent matrix comprises the following set of values:
• [96 59 56 78 18 122 −1 −1 −1 126 90 161 −1 −1 −1 74 65 45 2 0 −1 −1 −1 −1 8 98 85 97 22 61 −1 −1 −1 98 35 82 74 31 −1 108 −1 −1 −1 0 0 −1 −1 −1 71 153 156 102 74 70 42 −1 35 128 −1 −1 −1 118 14 −1 −1 65 −1 −1 0 0 −1 −1 18 131 88 18 109 113 146 69 84 −1 −1 −1 71 −1 −1 −1 92 79 0 −1 −1 0 0 −1 7 124 15 161 137 53 −1 161 110 −1 72 −1 53 −1 18 −1 145 −1 −1 −1 −1 −1 0 0 53 151 66 42 138 118 6 77 −1 −1 −1 70 −1 125 72 53 −1 −1 2 −1 −1 −1 −1 0].

An apparatus comprising:

• a receiver configured to receive encoded data over a wireless channel;
• and
• baseband circuitry configured to:
• identify, according to a code rate of 3/4 and a code block size of 3888 bits, a first binary parity check matrix for a quasi-cyclic-low-density parity-check (QC-LDPC) code, the first binary parity check matrix corresponding to a first exponent matrix having 144 values;
• identify a second binary parity check matrix in which one or more columns of the first binary parity check matrix are permuted, the second binary parity check matrix having the same dimensions as dimensions of the first binary parity check matrix;
• and
• decode, using a decoder of the baseband circuitry, the received encoded data using the second binary parity check matrix.