Circuitry for and methods of gain control

A system comprising:

• a first analog input for receiving a first analog input signal;
• a first analog gain stage configured to apply a first analog gain to the first analog input signal to generate the first input signal;
• an integrated circuit (IC), comprising:
• a first input pin for receiving the first input signal;
• a first converter configured to convert the first input signal to a first output signal;
• a first gain stage configured to apply a first gain to the first output signal to generate a first amplified output signal;
• gain update circuitry configured to:
• output a first external gain control signal to a first output pin of the IC;
• and
• subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage;
• and
• external filter circuitry provided between the first analog gain stage and the IC, the external filter circuitry configured to filter the first input signal to be provided to the IC, wherein the external filter circuitry contributes to the signal chain delay.

A system comprising:

• a first analog input for receiving a first analog input signal;
• a first analog gain stage configured to apply a first analog gain to the first analog input signal to generate the first input signal;
• an integrated circuit (IC), comprising:
• a first input pin for receiving the first input signal;
• a first converter configured to convert the first input signal to a first output signal;
• a first gain stage configured to apply a first gain to the first output signal to generate a first amplified output signal;
• gain update circuitry configured to:
• output a first external gain control signal to a first output pin of the IC;
• and
• subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage;
• a synchronization input pin for receiving a plurality of synchronization signals;
• and
• a synchronization interface configured to process the plurality of synchronization signals, wherein each of the plurality of synchronization signals comprises a zero-cross detection flag.