Bidirectional amplifier including matching circuits having symmetrical structure and communication device including the same

A communication device comprising:

• a processor;
• a signal controller configured to generate a control signal and a complementary control signal under a control of the processor;
• and
• a bidirectional amplifier configured to communicate with the processor and the signal controller, and
• wherein the bidirectional amplifier includes:
• a first matching circuit;
• a second matching circuit;
• and
• an amplifier circuit connected between the first matching circuit and the second matching circuit, configured to amplify a first input signal received from the first matching circuit to output the amplified first input signal to the second matching circuit, and configured to amplify a second input signal received from the second matching circuit to output the amplified second input signal to the first matching circuit,
• wherein the first and second matching circuits have a symmetrical structure and operate complementarily to each other;
• wherein the amplifier circuit includes:
• a first transistor;
• a first transistor;
• a third transistor having a gate node connected to a drain node of the first transistor and having a source node connected to a gate node of the first transistor;
• and
• a fourth transistor having a gate node connected to a drain node of the second transistor and having a source node connected to a gate node of the second transistor, and
• wherein the first matching circuit includes:
• a first main inductor connected between the first node and a ground node providing a ground power;
• a first inductor connected between the gate node of the first transistor and the gate node of the second transistor;
• and
• a second inductor connected between a source node of the first transistor and a source node of the second transistor,
• wherein the second matching circuit includes:
• a second main inductor connected between a second node and the ground node;
• a third inductor connected between a drain node of the third transistor and a drain node of the fourth transistor;
• and
• a fourth inductor connected between the gate node of the third transistor and the gate node of the fourth transistor.