I/O unit
AssigneeFanuc Corporation
InventorsMasahiro Saeki, Shinichi Kuwahata
Life of this patent
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Abstract
An I/O unit transmits signals between a master unit and instruments. The master unit has two redundant master processing circuits. The I/O unit includes: a first slave processing circuit that performs input and output of signals with respect to one of the two master processing circuits; and a second slave processing circuit that performs input and output of signals with respect to the other one of the two redundant master processing circuits.
Claims3
An I/O unit that connects a master unit and two redundant devices and transmits a signal between the master unit and the device, wherein the master unit includes two redundant master processing circuits, the I/O unit comprising:
- a first slave processing circuit configured to perform input and output of a signal between a first master processing circuit that is one of the two redundant master processing circuits and one of the two redundant devices;
- a first subsequent-stage terminal configured to connect the first slave processing circuit and a third slave processing circuit that is one of two slave processing circuits provided at a subsequent-stage unit that is another I/O unit installed at a subsequent stage of the I/O unit;
- a second slave processing circuit configured to perform input and output of a signal between the second master processing circuit that is another of the two redundant master processing circuits and another of the two redundant devices;
- a second subsequent-stage terminal configured to connect the second slave processing circuit and a fourth slave processing circuit that is another of the two slave processing circuits provided at the subsequent-stage unit;
- and
- a housing configured to be a separate entity from the master unit and each of the two redundant devices and to house the first slave processing unit and the second slave processing unit,
- wherein
- the third slave processing circuit is connected to the first master processing circuit via the first subsequent-stage terminal and the first slave processing circuit, and
- the fourth slave processing circuit is connected to the second master processing circuit via the second subsequent-stage terminal and the second slave processing circuit.
Dependencies are inferred from the claim text.