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US 12,547,411 B2Granted
Securing conditional speculative instruction execution
OwnerSteven Jeffrey Wallachinventor
Life of this patent
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Abstract
A method performed in a processor, includes: receiving, in the processor, a branch instruction in the processing; determining, by the processor, an address of an instruction after the branch instruction as a candidate for speculative execution, the address including an object identification and an offset; and determining, by the processor, whether or not to perform speculative execution of the instruction after the branch instruction based on the object identification of the address.
Claims20
A device, comprising:
- a memory;
- and
- a processor coupled to the memory and configured to determine, based on an identity of an object associated with a subsequent instruction to be executed following a branch instruction, whether to speculatively execute the subsequent instruction.
A method, comprising:
- storing, in a memory, an object having a subsequent instruction to be executed following a branch instruction;
- and
- determining, by a processor coupled to the memory and based on an identity of the object, whether to speculatively execute the subsequent instruction.
A microprocessor, comprising:
- a register configured to store a memory address configured to identify an object;
- an execution unit configured to execute a first instruction using the memory address in the register;
- wherein the microprocessor is configured to determine, based on an identity of the object, whether to execute a second instruction in the object, during speculative instruction execution.
Dependencies are inferred from the claim text.