Data transfer in port switch memory
OwnerFrank F. Rossinventor
Life of this patent
Estimating the term…
Abstract
The present disclosure includes apparatuses and methods related to data transfer in memory. An example apparatus can include a first number of memory devices coupled to a host via a first number of ports and a second number of memory devices coupled to the first number of memory device via a second number of ports, wherein a first number of commands are executed to transfer data between the first number of memory devices and the host via the first number of ports and a second number of commands are executed to transfer data between the first number of memory device and the second number of memory device via the second number of ports.
Claims20
An apparatus, comprising:
- a first number of memory devices coupled to a host via a first number of ports;
- and
- a second number of memory devices coupled to the first number of memory devices via a second number of ports,
- wherein the first number of memory devices and the second number of memory devices are configured to transfer a first portion of data between the first number of memory devices and the host via the first number of ports while the second number of memory devices transfers a second portion of data between the second first number of memory devices and the first number of memory devices via the second number of ports to cache the second portion of data in the first number of devices in response to receiving the second portion of data from the host and writing the second portion of data to the second number of memory devices.
An apparatus, comprising:
- a memory module, wherein the memory module includes a first number of memory devices and a second number of memory devices coupled to a controller, wherein the memory module is coupled to a host, and wherein the memory module is configured to:
- execute a first number of commands to transfer a first portion of data between the host and the first number of memory devices;
- and
- execute a second number of commands to transfer a second portion of data between the second number of memory devices and the first number of memory devices, wherein a first portion of the first number of commands are executed while a first portion of the second number of commands are executed and wherein the first portion of the second number of commands transfer the second portion of data to the first number of memory devices to cache the second portion of data in the first number of devices in response to receiving the second portion of data from the host and writing the second portion of data to the second number of memory devices.
A method, comprising:
- receiving, from a host, a first command at a controller coupled to a first number of memory devices, wherein the first command includes instructions to transfer a first portion of data between the host and the first number of memory devices;
- and
- executing the first command at the first number of memory devices by transferring the first portion of data between the host and the first number of memory devices while executing a second command at the first number of memory devices by transferring the second portion of data between a second number of memory devices and the first number of memory devices to cache the second portion of data in the first number of devices in response to receiving the second portion of data from the host and writing the second portion of data to the second number of memory devices.
Dependencies are inferred from the claim text.