Electronic circuit and method of error correction
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Chun Liao, Chao Chieh Li, Yu-Tso Lin, Min-Shueh Yuan
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Abstract
An electronic circuit and a method of error correction are provided. The electronic circuit includes a time-to-digital converter (TDC) and an error cancelation circuit. The TDC is configured to generate a first signal. The error cancelation circuit is configured to evaluate a majority of bit values of at least a portion of the first signal to generate a second signal. The number of transitions within the second signal is less than the number of transitions within the first signal.
Claims20
An electronic circuit, comprising:
- a time-to-digital converter (TDC), configured to generate a first signal;
- an error cancelation circuit, configured to evaluate a majority of bit values of at least a portion of the first signal to generate a second signal, wherein a first fractional phase error value determined by the first signal is greater than a second fractional phase error value determined by the second signal;
- an adder, connected to the error cancelation circuit and configured to receive the second fractional phase error value;
- a digital filter, connected to the adder and configured to generate a filtered phase error value based on the second fractional phase error value;
- and
- a multiplier, connected to the digital filter and configured to multiply the filtered phase error value with a normalization factor.
A method of error correction for an electronic circuit, comprising:
- receiving a first set of bits;
- evaluating a first rising edge and a first falling edge, wherein the first rising edge corresponds to the most recent transition from a low bit value to a high bit value, and the first falling edge corresponds to the most recent transition from a high bit value to a low bit value;
- and
- if a first difference between the first rising edge and the first falling edge is smaller than or equal to a first threshold value, evaluating a second rising edge and a second falling edge, wherein the second rising edge corresponds to the second most recent transition from low bit value to high bit value, and the second falling edge corresponds to the second most recent transition from high bit value to low bit value.
A method of error correction for an electronic circuit, comprising:
- generating a first signal by a time-to-digital converter (TDC);
- evaluating a majority of bit values of at least a portion of the first signal to generate a second signal by an error cancelation circuit, wherein a first fractional phase error value determined by the first signal is greater than a second fractional phase error value determined by the second signal;
- receiving the second fractional phase error value by an adder;
- generating a filtered phase error value based on the second fractional phase error value by a digital filter connected to the adder;
- and
- multiplying the filtered phase error value with a normalization factor.
Dependencies are inferred from the claim text.