Transistors with ferroelectric gates
AssigneeIntel Corporation
InventorsAbhishek A. Sharma, Ravi Pillarisetty, Brian S. Doyle, Elijah V. Karpov, Prashant Majhi, Gilbert W. Dewey, Benjamin Chu-Kung, Van H. Le, Jack T. Kavalieros, Tahir Ghani
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Abstract
Disclosed herein are transistors with ferroelectric gates, and related methods and devices. For example, in some embodiments, a transistor may include a channel material, and a gate stack, and the gate stack may include a gate electrode material and a ferroelectric material between the gate electrode material and the channel material.
Claims20
An integrated circuit (IC) structure, comprising:
- a substrate;
- one or more interconnect layers;
- and
- a transistor, including:
- a channel material, and
- a gate stack, including:
- a gate electrode material, and
- a ferroelectric material between the gate electrode material and the channel material,
- wherein at least 5% of crystals of the ferroelectric material have a grain orientation that is aligned with a grain orientation of the channel material;
- wherein the one or more interconnect layers are between the transistor and the substrate.
A computing device, comprising:
- an integrated circuit (IC) package, including:
- a package substrate, and
- an integrated circuit (IC) structure coupled to the package substrate, the IC structure comprising:
- a substrate,
- one or more interconnect layers, and
- a transistor, the transistor including a channel material and a gate stack, wherein the gate stack includes a gate electrode material, and a ferroelectric material between the gate electrode material and the channel material, and wherein at least 5% of crystals of the ferroelectric material have a grain orientation that is aligned with a grain orientation of the channel material,
- wherein the one or more interconnect layers are between the transistor and the substrate.
A process of making an integrated circuit (IC) structure, the process comprising:
- providing one or more interconnect layers over a substrate;
- and
- providing a transistor, the transistor including:
- a channel material, and
- a gate stack, including:
- a gate electrode material, and
- a ferroelectric material between the gate electrode material and the channel material,
- wherein at least 5% of crystals of the ferroelectric material have a grain orientation that is aligned with a grain orientation of the gate electrode material;
- wherein the one or more interconnect layers are between the transistor and the substrate.
Dependencies are inferred from the claim text.