Configurable voltage regulator circuit and transmitter circuit

A transmitter circuit, comprising:

• a voltage regulator circuit, configured to convert a first supply voltage to a second supply voltage, the voltage regulator circuit comprising:
• N transistors, wherein a first connection terminal of each transistor is coupled to the first supply voltage, and respective second connection terminals of the N transistors are coupled to N nodes;
• and
• a first amplifier, wherein a first input terminal of the first amplifier is coupled to a first reference voltage, a second input terminal of the first amplifier is selectively coupled to the N nodes, and an output terminal of the first amplifier is selectively coupled to respective control terminals of the N transistors;
• and
• N driver circuits, coupled to the N nodes, and selectively coupled to the second input terminal of the first amplifier through the N nodes;
• wherein when the output terminal of the first amplifier is coupled to respective control terminals of M of the N transistors while uncoupled from respective control terminals of remaining (N-M) transistors, the second input terminal of the first amplifier is coupled to M nodes corresponding to the M transistors while uncoupled from (N-M) nodes corresponding to the (N-M) transistors, and M driver circuits coupled to the M nodes are configured to receive the second supply voltage outputted by the M transistors through the M nodes to generate M data signals.

A transmitter circuit, comprising:

• a voltage regulator circuit, configured to convert a first supply voltage to a second supply voltage, the voltage regulator circuit comprising:
• N transistors, wherein a first connection terminal of each transistor is coupled to the first supply voltage, and respective second connection terminals of the N transistors are coupled to N nodes;
• and
• a first amplifier, wherein a first input terminal of the first amplifier is coupled to a first reference voltage, a second input terminal of the first amplifier is selectively coupled to the N nodes, and an output terminal of the first amplifier is selectively coupled to respective control terminals of the N transistors;
• and
• N driver circuits, coupled to the N nodes, and selectively coupled to the second input terminal of the first amplifier through the N nodes, wherein the N driver circuits have N data output terminals respectively, and each driver circuit is configured to output a data signal through a corresponding data output terminal;
• the driver circuit comprises:
• a first switch, selectively coupled between the data output terminal and a node coupled to the driver circuit;
• a second switch, selectively coupled between the data output terminal and a second reference voltage;
• a third switch, selectively coupled between the node and the data output terminal;
• and
• a fourth switch, selectively coupled between the data output terminal and the second reference voltage;
• wherein when one of the first switch and the second switch is switched on, the other of the first switch and the second switch is switched off;
• when one of the third switch and the fourth switch is switched on, the other of the third switch and the fourth switch is switched off.