Input buffer and a method for reducing a signal amplitude dependency of said input buffer
AssigneeImec Vzw
InventorsNereo Markulic, Jan Craninckx
Life of this patent
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AssigneeImec Vzw
InventorsNereo Markulic, Jan Craninckx
Estimating the term…
An input buffer for an analog-to-digital converter, ADC, is provided. The input buffer is configured for receiving an input signal (Vin) and for outputting an output signal (Vout), and comprises an nMOS transistor and pMOS transistor. The nMOS transistor and the pMOS transistor are arranged in a push-pull configuration such that the input signal is fed to gates of the nMOS transistor and the pMOS transistor and the output signal is taken from sources of the nMOS and the pMOS transistors. The input buffer comprises a first varactor connected between a gate of the nMOS transistor and a first biasing voltage potential (V21), and a second varactor connected between a gate of the pMOS transistor and a second biasing voltage potential (V22), which are configured to reduce a signal amplitude dependency of a capacitance of the input buffer.
An input buffer for an analog-to-digital converter, ADC, configured for receiving an input signal and for outputting an output signal, the input buffer comprising:
A method for reducing a signal amplitude dependency of an input buffer comprising the steps of:
Dependencies are inferred from the claim text.