Gate resistor bypass for RF FET switch stack
AssigneepSemi Corporation
InventorsRavindranath D. Shrivastava, Fleming Lam, Payman Shanjani
Life of this patent
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AssigneepSemi Corporation
InventorsRavindranath D. Shrivastava, Fleming Lam, Payman Shanjani
Estimating the term…
A common gate resistor bypass arrangement for a stacked arrangement of FET switches, the arrangement including a series combination of an nMOS transistor and a pMOS transistor connected across a common gate resistor. During at least a transition portion of the transition state of the stacked arrangement of FET switches, the nMOS transistor and the pMOS transistor are both in an ON state and bypass the common gate resistor. On the other hand, during at least a steady state portion of the ON steady state and the OFF steady state of the stacked arrangement of FET switches, one of the nMOS transistor and the pMOS transistor is in an OFF state and the other of the nMOS transistor and the pMOS transistor is in an ON state, thus not bypassing the common gate resistor.
A method to controllably bypass a resistor across a series combination of an nMOS transistor and a pMOS transistor, the series combination receiving a control signal that switches from a first static state to a second static state and vice versa, the method comprising:
Dependencies are inferred from the claim text.