High resolution display circuitry with global initialization

A method of operating a display having an array of pixels, the method comprising:

• during an emission phase, driving a power supply voltage high and driving an emission signal high so that the array of pixels emit light;
• during an entirety of a global reset phase, driving the power supply voltage low and simultaneously asserting scan signals for multiple rows of pixels in the array of pixels to apply a reference voltage to pixels in the multiple rows of pixels;
• and
• during a programming phase, sequentially asserting the scan signals to load data into respective rows in the array of pixels while driving the power supply voltage high.

Display circuitry comprising:

• a first pixel having a first light-emitting diode, a first drive transistor coupled in series with the first light-emitting diode, and a first pass transistor coupled at a gate terminal of the first drive transistor;
• a second pixel having a second light-emitting diode, a second drive transistor coupled in series with the second light-emitting diode, and a second pass transistor coupled at a gate terminal of the second drive transistor;
• a scan line coupled to the first pass transistor in the first pixel and the second pass transistor in the second pixel, wherein the first and second pixels each include only two transistors and one or more capacitors;
• a shared emission transistor having a first source-drain terminal coupled to drain terminals of the first and second drive transistors;
• a first switch having a first source-drain terminal coupled to a second source-drain terminal of the shared emission transistor and having a second source-drain terminal coupled to a first voltage line on which a first voltage is provided;
• and
• a second switch having a first source-drain terminal coupled to the second source-drain terminal of the shared emission transistor and having a second source-drain terminal coupled to a second voltage line on which a second voltage, different than the first voltage is provided, wherein at most one of the first and second switches is activated at any given point in time during operation of the display circuitry.