Electronic circuit

An electronic circuit, comprising:

• a first transistor;
• a second transistor, wherein a first terminal of the first transistor is connected to a first terminal of the second transistor and a voltage stabilizing node, wherein a second terminal of the first transistor is connected to a second terminal of the second transistor and a first connection node, wherein the first terminal of the first transistor is a gate terminal of the first transistor, wherein the first terminal of the second transistor is a gate terminal of the second transistor;
• a third transistor;
• a fourth transistor, wherein a first terminal of the third transistor is connected to a first terminal of the fourth transistor and the voltage stabilizing node, wherein a second terminal of the third transistor is connected to a second terminal of a fourth transistor and a second connection node, wherein the first terminal of the third transistor is a gate terminal of the third transistor, wherein the first terminal of the fourth transistor is a gate terminal of the fourth transistor;
• a first compensation transistor, comprising a first terminal, a second terminal, and a third terminal, wherein the first terminal of the first compensation transistor is connected to the second terminal of the first compensation transistor and the first connection node, and the third terminal of the first compensation transistor receives one of a scan signal and a reset signal;
• a second compensation transistor, comprising a first terminal, a second terminal, and a third terminal, wherein the second terminal of the second compensation transistor is connected to the second connection node, and the third terminal of the second compensation transistor receives a reference low voltage signal;
• a third compensation transistor, wherein a first terminal of the third compensation transistor is connected to the first terminal of the second compensation transistor;
• and
• a fourth compensation transistor, coupled to the first compensation transistor, wherein a first terminal of the fourth compensation transistor is coupled to the first terminal of the second compensation transistor, wherein a second terminal of the fourth compensation transistor is coupled to the first connection node.