Executing phantom loops in a microprocessor
AssigneeSimplex Micro, Inc.
InventorThang Minh Tran
Life of this patent
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Abstract
A processor includes a loop detection unit to detect a phantom-loop based on the resources reserved for execution of the phantom loop. The processor executes the phantom loop by reading source operand data on a first iteration of the loop and writing back data on the last iteration of the loop while allowing instructions after the loop to be concurrently executed.
Claims24
A processor comprising:
- a register file including a plurality of registers;
- a phantom loop detection circuit that detects a phantom loop in a set of instructions, wherein the phantom loop is a loop in which source data is read from the register file only on a first iteration of the loop and result data is written to the register file only on a last iteration of the loop;
- an instruction issue unit coupled to the phantom loop detection circuit for receiving instructions from the phantom loop detection circuit, and issuing those instructions;
- an execution queue coupled to the instruction issue unit to receive a first instruction of the loop when the phantom loop is detected from the instruction issue unit, and dispatch the first instruction to a functional unit upon each iteration of the phantom loop until completion of the phantom loop;
- and
- wherein the functional unit writes back result data to the register file only upon completion of the phantom loop.
A processor comprising:
- a clock circuit;
- a time counter storing a time count representing a current time of the processor, wherein
- the time count is incremented with each cycle of the clock circuit;
- a register file including a plurality of registers;
- a loop detection circuit that detects a phantom loop in a set of instructions, wherein the phantom loop is a loop in which source data is read from the register file only in a first iteration of the phantom loop and result data is written to the register file only on a last iteration of the phantom loop;
- an instruction issue unit coupled to the loop detection circuit for receiving instructions from the loop detection circuit, and issuing instructions within a detected phantom loop;
- an execution queue coupled to the instruction issue unit to receive a first phantom loop instruction from the instruction issue unit, and dispatch the first phantom loop instruction to a functional unit for every iteration of the detected phantom loop until completion of the detected phantom loop, and then writing back result data of a last iteration of the detected phantom loop to the register file;
- a register scoreboard storing a first write time and a loop bit to a selected register in the register file, wherein the first write time is a future time based on the time count and wherein the loop bit indicates the selected register is used in a phantom loop operation;
- an instruction decode unit that determines an execution time for a selected instruction;
- a time-resource matrix coupled to the register scoreboard and the time counter for storing information relating to available resources for each time count of the time counter and wherein the information relating to the available resources is adjusted to account for resources used by the phantom loop operation;
- wherein the available resources include at least one of:
- a plurality of read buses, a plurality of write buses, and a plurality of functional units.
A computer program product for implementing a microprocessor, the computer program product stored on a non-transitory computer readable storage medium and including instructions for causing a computer system to execute a method, that is executable by the microprocessor, for detecting a phantom loop based on available resources dedicated to execution of a phantom loop operation by the microprocessor, the method executable by the computer system comprising:
- detecting among a group of instructions that constitute a loop, a phantom loop in which source data is read from a register file only on a first iteration of the phantom loop and result data is written to the register file only on a last iteration of the phantom loop;
- reserving a plurality of resources for execution of the phantom loop, the plurality of resources including a plurality of read buses, a plurality of write buses, and a plurality of functional units;
- providing instructions in the phantom loop to an execution queue in the microprocessor processor for execution by a selected functional unit of the plurality of functional units;
- and
- forwarding result data from the selected functional unit to another functional unit without writing to any register until a last iteration of the phantom loop.
Dependencies are inferred from the claim text.