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US 12,540,971 B2Granted
Debug data communication system for multiple chips
AssigneeIntel Corporation
InventorsVui Yong Liew, Zhenyu Zhu, Mikal C. Hunsaker, Wai Mun Ng
Life of this patent
Estimating the term…
Abstract
An apparatus comprises a first semiconductor chip comprising a first communication controller to receive first debug data from a second semiconductor chip; a memory to store the first debug data from the second semiconductor chip and second debug data of the first semiconductor chip; and a second communication controller to transmit the first debug data from the second semiconductor chip and the second debug data of the first semiconductor chip to an output port of the first semiconductor chip.
Claims18
An apparatus comprising:
- a first semiconductor chip comprising:
- a first communication controller to receive first debug data from a second semiconductor chip;
- a memory to store the first debug data from the second semiconductor chip and second debug data of the first semiconductor chip;
- and
- a second communication controller to transmit the first debug data from the second semiconductor chip and the second debug data of the first semiconductor chip to an output port of the first semiconductor chip.
2 more elements
A method comprising:
- receiving, by a first communication controller of a first semiconductor chip, first debug data from a second semiconductor chip;
- storing, by a memory, the first debug data from the second semiconductor chip and second debug data of the first semiconductor chip;
- and
- transmitting, by a second communication controller of the first semiconductor chip, the first debug data from the second semiconductor chip and the second debug data of the first semiconductor chip to an output port of the first semiconductor chip.
1 more element
Dependencies are inferred from the claim text.