Flash memory structure with enhanced floating gate
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Shu Huang, Ming Chyi Liu
Life of this patent
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Abstract
The present disclosure relates to a method of forming a flash memory structure. The method includes forming a sacrificial material over a substrate, and forming a plurality of trenches extending through the sacrificial material to within the substrate. A dielectric material is formed within the plurality of trenches. The dielectric material is selectively etched, according to a mask that is directly over the dielectric material, to form depressions along edges of the plurality of trenches. The sacrificial material between neighboring ones of the depressions is removed to form a floating gate recess. A floating gate material is formed within the floating gate recess and the neighboring ones of the depressions.
Claims20
A method of forming a semiconductor device, comprising:
- etching a substrate to form a plurality of trenches within the substrate;
- forming an insulating pattern covering bottom surfaces of the plurality of trenches and inner side surfaces of the plurality of trenches;
- wherein active patterns are defined by the plurality of trenches, wherein the active patterns are spaced apart from each other in a first direction and are parallel to each other, the first direction parallel to a top surface of the substrate, and at least one of opposite topmost ends of the active patterns has a stepwise portion comprising a horizontally extending surface between an underlying lower interior sidewall of the substrate and an overlying upper interior sidewall of the substrate;
- and
- wherein the insulating pattern has a topmost surface that extends between opposing outermost sidewalls of the insulating pattern and that is vertically above a top of the upper interior sidewall.
A method of fabricating a semiconductor device, comprising:
- forming a plurality of trenches in a substrate, the plurality of trenches defining a plateau pattern between the plurality of trenches;
- filling a lower oxide layer to fill portions of the plurality of trenches;
- forming an upper oxide layer over the lower oxide layer and wrapping around a top and opposing sides of the plateau pattern, wherein the upper oxide layer is formed by oxidizing opposite topmost ends of the plateau pattern to form a stepwise portion in at least one of the opposite topmost ends of the plateau pattern;
- and
- wherein the lower oxide layer comprises a separate lower oxide segment within respective ones of the plurality of trenches in a cross-sectional view, the lower oxide segment having a central region that vertically extends from a bottom of a trench to a non-zero distance above a topmost surface of the plateau pattern.
A method of forming a semiconductor device, comprising:
- forming a trench within a substrate, the trench being formed by interior surfaces of the substrate that are disposed on opposing sides of an active pattern, as viewed in a cross-sectional view;
- forming a sacrificial material within the trench and vertically above the active pattern, wherein the sacrificial material has a topmost surface laterally extending between opposing outermost sidewalls of the sacrificial material and vertically above a topmost surface of the active pattern;
- removing a part of the sacrificial material that is over the active pattern;
- and
- performing an oxidation process to form a protection pattern wrapping around a top and the opposing sides of the active pattern, the protection pattern having a bottommost surface that is a non-zero distance vertically above a bottom of the trench.
Dependencies are inferred from the claim text.