Digital zero-current switching lock-in controller IC for optimized operation of resonant switched-capacitor converters (SCCs)

A method for controlling a resonant-type converter with one or more resonant tanks and one or more flying capacitors connected across said resonant tanks, comprising:

• a) performing, by an auto-tuner that receives as input Zero-Current Detect (ZCD) signals, arithmetic operations that ensure Zero-Current Switching (ZCS) operation for all resonant tanks in said converter, to implement a tuning algorithm;
• b) generating, by a digital High-Resolution (HR) sequencer that receives as input the switching-times commands, a pulse-width-modulated drive signal that is fed into at least one gate of at least one switching transistor of said converter;
• c) accurately reading of the outputs of at least one ZCD sensor by a sampling block with time resolution of a single delay-element;
• and
• d) performing synchronization actions and dictating the operation mode during control operation, based on auxiliary configurations,
• wherein Zero-Current Switching (ZCS) operation for all resonant tanks in said converter is performed by:
• initiating a delay estimation procedure for estimating an inherent delay, being the minimum delay between gating signals of said controller and a sampling command that acquires a valid reading from the at least one ZCD sensor, between the gating signals of said controller by sampling the at least one ZCD sensor, once every switching cycle in different locations
• applying a pre-defined switching frequency is to each resonant tank, until early-switching reading from the at least one ZCD sensor is acquired;
• performing turn-off of power transistors upon start-up and every Nest switching cycles, to thereby consider variations of passive components and clamp the voltage at the switching nodes, when the power transistors are turned-off at the end of a charging phase, wherein a sampling operation of the sampling block comprises:
• a) a synchronous procedure utilizing a system's internal clock by performing continuous sampling of the ZCD sensors at the internal clock's frequency from a turn-off command by the controller, until the end of an applied dead-time and processing the samples to acquire the converter's switching-state;
• and
• b) an asynchronous procedure combining the system's internal clock and a delay-line based module for high-resolution sampling with time-resolution of a single delay-element, where, the converter's switching-state is accurately acquired, based on an estimated inherent delay upon start-up, using a single sampling operation,
• wherein, once a dead-time period is over, the sampling block provides the auto-tuner with valid readings of the at least one ZCD sensor.

A digital lock-in controller for a resonant-type converter with one or more sub-circuits having resonant tanks and one or more flying capacitors connected across said resonant tanks, comprising:

• a) an auto-tuner that receives as input Zero-Current Detect (ZCD) signals and implements a tuning algorithm by performing arithmetic operations that ensure Zero-Current Switching (ZCS) operation for all resonant tanks in said converter;
• b) a digital High-Resolution (HR) sequencer that receives as input switching-times commands and generates a pulse-width-modulated drive signal that is fed into gates of converter's switching transistors at least one gate of at least one switching transistor of said converter;
• c) a sampling block with time resolution of a single delay-element, for accurately reading outputs of at least one ZCD sensor including said ZCD signals;
• and
• d) a governor module for performing synchronization actions and dictating an operation mode of the controller, based on auxiliary configurations,
• wherein Zero-Current Switching (ZCS) operation for all resonant tanks in said converter is performed by:
• initiating a delay estimation procedure for estimating an inherent delay, being the minimum delay between the controller gating signals gating signals of said controller and a sampling command that acquires a valid reading from the at least one ZCD sensor, between the gating signals of said controller by sampling the at least one ZCD sensor, once every switching cycle in different locations;
• applying a pre-defined switching frequency is to each resonant tank, until early-switching reading from the at least one ZCD sensor is acquired;
• performing actual turn-off of power transistors upon start-up and every Nest switching cycles, to thereby consider variations of passive components and clamp the voltage at the switching nodes, when the power stage transistors are turned-off at the end of a charging phase, wherein a lock-in process to resonance characteristics of each resonant tank comprises:
• ae) operating according to user configurable gating-commands signals without compensation for a pre-determined number of switching-cycles;
• f) upon start-up, calculating an inherent delay between the controller and the said converter's transistors;
• g) sampling the ZCD sensors at least one ZCD sensor to obtain early or late switching-state of each resonant tank;
• h) calculating an error signal based on the acquired switching-state of said converter;
• i) modifying the duration of the switching cycle for each resonant tank by:
• i1) increasing the duration in case early-switching is acquired;
• or
• i2) decreasing the duration in case late-switching is acquired;
• j) calculating the converters switching period based on the results of step e) above;
• k) updating the gating-command signals for each resonant-tank;
• and
• l) repeating steps g)-j) above, until the controller is disabled, wherein a sampling operation performed by the sampling block is executed as:
• m) a synchronous procedure utilizing a system's internal clock for compensating the inherent delay with the resolution of said internal clock, by performing continuous sampling of the ZCD sensors at least one ZCD sensor at the internal clock's frequency from a turn-off command by the controller, until the end of an applied dead-time and processing the samples to acquire the converter's switching-state;
• or
• n) an asynchronous procedure combining the system's internal clock and a delay-line based module for high-resolution sampling with time-resolution of a single delay-element, where, the converter's switching-state is accurately acquired, based on an estimated inherent delay upon start-up, using a single sampling operation,
• wherein, once a dead-time period is over, the sampling block provides the auto-tuner with valid readings of the ZCD sensors at least one ZCD sensor, wherein an inherent delay between the controller's outputs and a RSCC transistors' conduction instance is calculated upon start-up by:
• o) defining default switching frequency according to the nominal values of the passive components of the resonant-tanks, to deliberately ensure early-switching in all sub-circuits;
• p) sampling the ZCD sensors' outputs of the at least one ZCD sensor once every switching-cycle;
• q) evaluating the acquired readings and modifying the sampling location accordingly;
• r) repeating steps p)-q) above until a valid early-switching reading is acquired;
• and
• s) estimating the inherent delay, based on the sampling-time at the end of the preceding step r).

A method for controlling Resonant-type converters a resonant-type converter with one or more resonant tanks and one or more flying capacitors connected across said resonant tanks, comprising:

• a) performing, by an auto-tuner that receives as input Zero-Current Detect (ZCD) signals, arithmetic operations that ensure Zero-Current Switching (ZCS) operation for all resonant tanks in said converter, to implement a tuning algorithm;
• b) generating, by a digital hybrid High-Resolution (HR) sequencer that receives as input the switching-times commands, a pulse-width-modulated drive signal that is fed into the gates at least one gate of the converter's switching transistors at least one switching transistor of said converter;
• c) accurately reading of the ZCD sensor's outputs of at least one ZCD sensor by a sampling block with time resolution of a single delay-element;
• and
• d) performing synchronization actions and dictating the operation mode during control operation, based on auxiliary configurations,
• wherein Zero-Current Switching (ZCS) operation for all resonant tanks in said converter is performed by:
• initiating a delay estimation procedure for estimating an inherent delay, being the minimum delay between the controller gating signals of said controller and a sampling command that acquires a valid reading from the at least one ZCD sensor, between the gating signals of said controller by sampling the at least one ZCD sensor, once every switching cycle in different locations
• applying a pre-defined switching frequency is to each resonant tank, until early-switching reading from the at least one ZCD sensor is acquired;
• performing actual turn-off of power transistors upon start-up and every Nest switching cycles, to thereby consider variations of passive components and clamp the voltage at the switching nodes, when the power stage transistors are turned-off at the end of a charging phase, wherein the sampling operation if the sampling block is executed as a sampling operation of the sampling block comprises:
• e) a synchronous procedure utilizing a system's internal clock by performing continuous sampling of the ZCD sensors at the internal clock's frequency from a turn-off command by the controller, until the end of an applied dead-time and processing the samples to acquire the converter's switching-state;
• or
• f) an asynchronous procedure combining the system's internal clock and a delay-line based module for high-resolution sampling with time-resolution of a single delay-element, where, the converter's switching-state is accurately acquired, based on an estimated inherent delay upon start-up, using a single sampling operation,
• wherein, once a dead-time period is over, the sampling block provides the auto-tuner with valid readings of the ZCD sensors at least one ZCD sensor, wherein an inherent delay between the controller's outputs and a RSCC transistors' conduction instance is calculated upon start-up by:
• g) defining default switching frequency according to the nominal values of the passive components of the resonant-tanks, to deliberately ensure early-switching in all sub-circuits;
• g) sampling the ZCD sensors' outputs of the at least one ZCD sensor once every switching-cycle;
• h) evaluating the acquired readings and modifying the sampling location accordingly;
• i) repeating steps g)-h) above until a valid early-switching reading is acquired;
• and
• j) estimating the inherent delay, based on the sampling-time at the end of the preceding step i).