Display panel
AssigneeInnolux Corporation
InventorsMing-Jou Tai, Chia-Hao Tsai, Yi-Shiuan Cherng, Youcheng Lu
Life of this patent
Estimating the term…
Abstract
A panel is provided. The display panel includes a plurality of signal lines and a plurality of transistors. The plurality of transistors are disposed in the peripheral region. Each of the plurality of transistors comprises a gate, a source and a drain. At least one of the plurality of signal lines is electrically connected to the source or the drain of one of the plurality of transistors. The at least one of the plurality of signal lines includes a turning portion. The turning portion is disposed in the peripheral region. Therefore, the panel of the disclosure can reduce the circuit placement space in the peripheral region.
Claims18
A panel comprising a peripheral region, wherein the panel comprises:
- a plurality of signal lines;
- and
- a plurality of transistors, disposed in the peripheral region,
- wherein each of the plurality of transistors comprises a gate, a source and a drain, at least one of the plurality of signal lines is electrically connected to the source or the drain of one of the plurality of transistors, the at least one of the plurality of signal lines comprises a turning portion, and the turning portion is disposed in the peripheral region,
- wherein a plurality of sources of the plurality of transistors are extended to a plurality of vias through a plurality of wires of a same metal layer, and then electrically connected to the plurality of signal lines through the plurality of vias.
A panel comprising a peripheral region, wherein the panel comprises:
- a plurality of signal lines;
- and
- a plurality of transistors, disposed in the peripheral region,
- wherein each of the plurality of transistors comprises a gate, a source and a drain, at least one of the plurality of signal lines is electrically connected to the source or the drain of one of the plurality of transistors, the at least one of the plurality of signal lines comprises a turning portion, and the turning portion is disposed in the peripheral region,
- wherein a plurality of gates of the plurality of transistors are extended below a control line through a plurality of wires of a same metal layer, and are electrically connected to the control line through a plurality of vias.
Dependencies are inferred from the claim text.