Delay circuit and operational method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMasaya Hamada, Makoto Yabuuchi
Life of this patent
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Abstract
A circuit is provided. The circuit comprises a first power switch, a second power switch and delay elements. The first power switch adjusts a first voltage on a first metal line according to an input signal. The second power switch adjusts a second voltage on a second metal line according to the first voltage. The delay elements are coupled between the first metal line and the second metal line, and delay, in response to the adjusted first voltage and the adjusted second voltage, the input signal to generate an output signal.
Claims20
A circuit, comprising:
- a first power switch configured to adjust a first voltage on a first metal line according to an input signal;
- a second power switch configured to adjust a second voltage on a second metal line according to the first voltage;
- and
- a plurality of delay elements coupled between the first metal line and the second metal line, and configured to delay, in response to the adjusted first voltage and the adjusted second voltage, the input signal to generate an output signal.
A circuit comprising:
- a first power switch coupled to a first metal line and configured to provide a first voltage on the first metal line in response to an input signal;
- a second power switch that is coupled between the first metal line and a second metal line and is configured to provide a second voltage on the second metal line in response to the first voltage;
- a plurality of delay elements coupled in series;
- a first delay element coupled to the first voltage and a third voltage, wherein the first delay element comprises:
- a first input terminal coupled to the input signal;
- and
- an output terminal coupled to the plurality of delay elements;
- and
- a second delay element powered by the second voltage and a fourth voltage, wherein the second delay element comprises:
- a first input terminal coupled to the plurality of delay elements;
- and
- an output terminal configured to generate an delayed signal of the input signal.
A method, comprising:
- pulling down, by a first power switch, a first voltage on a first metal line in response to an input signal;
- pulling up, by a second power switch, a second voltage on a second metal line in response to the first voltage being pulled down;
- powering up a plurality of delay elements by the first and second voltages;
- and
- pulling up an output signal through the plurality of delay elements in response to the second voltage being pulled up after a first delay time.
Dependencies are inferred from the claim text.