High-linearity dynamic amplifier

A high-linearity dynamic amplifier, comprising:

• a first differential branch and a second differential branch, wherein
• the first differential branch comprises a first metal oxide semiconductor (MOS) transistor and a second MOS transistor, wherein the first MOS transistor and the second MOS transistor are connected between a high-level terminal and a ground-level terminal in series, and a connection point of the first MOS transistor and the second MOS transistor is a second output terminal;
• the second differential branch comprises a third MOS transistor and a fourth MOS transistor, wherein the third MOS transistor and the fourth MOS transistor are connected between the high-level terminal and the ground-level terminal in series, and a connection point of the third MOS transistor and the fourth MOS transistor is a first output terminal;
• a grid terminal of the second MOS transistor is connected to a drain terminal of the fourth MOS transistor, and a grid terminal of the fourth MOS transistor is connected to a drain terminal of the second MOS transistor;
• a grid terminal of the first MOS transistor is connected to one input terminal of the high-linearity dynamic amplifier, and a grid terminal of the third MOS transistor is connected to the other input terminal of the high-linearity dynamic amplifier;
• the first MOS transistor, the second MOS transistor, the third MOS transistor and the fourth MOS transistor are P-channel metal oxide semiconductor (PMOS) transistors;
• a source terminal of the second MOS transistor is connected to the high-level terminal, and the drain terminal of the second MOS transistor is connected to a source terminal of the first MOS transistor;
• a drain terminal of the first MOS transistor is connected to the ground-level terminal;
• a source terminal of the fourth MOS transistor is connected to the high-level terminal, and the drain terminal of the fourth MOS transistor is connected to a source terminal of the third MOS transistor;
• and
• a drain terminal of the third MOS transistor is connected to the ground-level terminal;
• a fifth MOS transistor, wherein a grid terminal of the fifth MOS transistor is connected to a first input terminal, a source terminal of the fifth MOS transistor is connected to the second output terminal, and a drain terminal of the fifth MOS transistor is connected to the ground-level terminal;
• and
• a sixth MOS transistor, wherein a grid terminal of the sixth MOS transistor is connected to a second input terminal, a source terminal of the sixth MOS transistor is connected to the first output terminal, and a drain terminal of the sixth MOS transistor is connected to the ground-level terminal;
• wherein the grid terminal of the first MOS transistor is connected to the second input terminal, and the grid terminal of the third MOS transistor is connected to the first input terminal;
• the fifth MOS transistor and the sixth MOS transistor are PMOS transistors, and
• the first input terminal and the second input terminal are two input terminals of the high-linearity dynamic amplifier.