Memory device for performing read operation
AssigneeSK hynix Inc.
InventorsJae Yeop Jung, Dong Hun Kwak
Life of this patent
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Abstract
A memory device includes: a plurality of memory cell strings including a plurality of memory cells connected to a plurality of word lines; a peripheral circuit for performing a read operation that reads data stored selected memory cells connected to a selected word line among the plurality of word lines; and a read operation controller for controlling the peripheral circuit to perform the read operation in a first mode or a second mode, based on a result obtained by performing a disturb sensing operation that identifies a degree to which a threshold voltage of dummy memory cells connected to a dummy word line is changed when the selected word line is included in weak word line information.
Claims20
A memory device comprising:
- a plurality of memory cell strings including a plurality of memory cells connected to a plurality of word lines;
- a peripheral circuit configured to perform a read operation that reads data stored selected memory cells connected to a selected word line among the plurality of word lines;
- and
- a read operation controller configured to control the peripheral circuit to perform the read operation,
- wherein the read operation controller configured to:
- control the peripheral circuit to perform the read operation in a first mode based on a result obtained by performing a disturb sensing operation that identifies a degree to which a threshold voltage of dummy memory cells connected to a dummy word line is changed when selected word line is included in weak word line information, and
- control the peripheral circuit to perform the read operation in a second mode,
- wherein, an extent to which a magnitude of a channel potential of unselected memory cell strings, among the plurality of memory cell strings, increases in the first mode is smaller than an extent to which a magnitude of the channel potential of the unselected memory cell strings increases in the second mode.
A memory device comprising:
- a plurality of memory cell strings including a plurality of memory cells connected to a plurality of word lines;
- a peripheral circuit configured to perform a read operation that reads data stored selected memory cells connected to a selected word line among the plurality of word lines;
- and
- a read operation controller configured to, in the read operation, control the peripheral circuit to change an extent to which the magnitude of a channel potential of unselected memory cell strings, among the plurality of memory cell strings, increases according to a position of the selected word line within a channel region formed in a pillar structure.
Dependencies are inferred from the claim text.