Memory cell

A method for using a programmable memory cell, wherein the programmable memory cell comprises:

• first, second, and third semiconductor regions laterally bounded by insulated conductive walls, a first insulating layer overlaying the first, second, and third semiconductor regions and a second conductive layer disposed facing a part of each of the first, second, and third semiconductor regions, a first top part of the first semiconductor region doped of a first conductivity type and disposed facing the second conductive layer, the second semiconductor region comprising second top parts, the second top parts forming a transistor with the first insulating layer and second conductive layer, a third top part of the third semiconductor region doped of a second conductivity type and disposed facing the second conductive layer, wherein the second conductivity type is opposite the first conductivity type, the method comprising:
• programming a first value into the programmable memory cell by applying an electrical field comprised between 5 MV/cm and 10 MV/cm between the first semiconductor region and the second conductive layer;
• and
• programming a second value into the programmable memory cell by applying an electrical field comprised between 5 MV/cm and 10 MV/cm between the third semiconductor region and the second conductive layer.