Manufacturing method of non-volatile memory device having uniform dielectric film profile

A manufacturing method of a non-volatile memory device, the method comprising:

• forming a tunneling gate insulating layer on a substrate;
• forming a floating gate on the tunneling gate insulating layer;
• forming a hard mask layer on the floating gate;
• forming a first insulating layer having an L-shape on a sidewall of the floating gate and on the substrate;
• forming a second insulating layer having a rectangular shape on the first insulating layer;
• forming a control gate insulating layer on the first and second insulating layers, the hard mask layer and the substrate, such that the control gate insulating layer is in direct contact with each upper surface of the hard mask layer and the substrate, and upper and side surfaces of the spacer-shaped first and second insulating layers;
• forming a control gate having a curved surface away from the floating gate on the control gate insulating layer;
• forming a spacer on the control gate;
• forming a source region and a drain region in the substrate;
• forming a silicide layer on the control gate;
• forming an etch stop layer on the silicide layer, the source region, and the drain region, such that the etch stop layer is in direct contact with the silicide layer and the spacer;
• and
• forming a first contact plug and a second contact plug through the etch stop layer on the source region and the drain region, respectively,
• wherein the first insulating layer has an L-shape which is in direct contact with the second insulating layer in a horizontal direction and a vertical direction.

A manufacturing method of a non-volatile memory device, the method comprising:

• forming a tunneling gate insulating layer on a substrate;
• forming a floating gate on the tunneling gate insulating layer;
• forming a hard mask layer on the floating gate;
• forming a first insulating layer having an L-shape on a sidewall of the floating gate and on the substrate;
• forming a second insulating layer having a rectangular shape on the first insulating layer;
• forming a control gate insulating layer on the first and second insulating layers, the hard mask layer and the substrate, such that the control gate insulating layer is in direct contact with each upper surface of the hard mask layer and the substrate, and upper and side surfaces of the first and second insulating layers;
• and
• forming a control gate having a curved surface away from the floating gate on the control gate insulating layer;
• forming a spacer on the control gate;
• forming a source region and a drain region adjacent to the spacer;
• forming a silicide layer on the control gate;
• and
• forming an etch stop layer on the silicide layer, the source region, and the drain region, such that the etch stop layer is in direct contact with the silicide layer and the spacer;
• and
• forming a first contact plug and a second contact plug through the etch stop layer on the source region and the drain region, respectively,
• wherein the first insulating layer has an L-shape which is in direct contact with the second insulating layer in a horizontal direction and a vertical direction.