US 12,525,926 B2 · Load regulation for LDO with low loop gain

Abstract

Circuits and methods for maintaining loop stability and good load regulation in low loop gain LDO regulator circuits. Embodiments encompass LDO regulator circuits that include an offset error correction circuit that generates an opposing voltage VOFFSET as a function of load current to substantially cancel out variations in VOUT that would otherwise occur due to load regulation limitations of the LDO regulator circuits. Embodiments use VOFFSET to imbalance currents in differential paths in a last-stage LDO error-amplifier so that an offset is propagated to a pair of inputs to the error-amplifier, thereby altering the output voltage VOUT to a corrected value. Benefits include improved LDO load regulation even when feedback loop gain is low, the available of both digital and analog implementations, high LDO accuracy and less variation of the output voltage VOUT, and suitability for implementation in integrated circuits for applications such as high precision power supplies.

Claims20

Dependent claims

A low-dropout (LDO) regulator circuit including:

(a) an input configured to receive an unregulated voltage from a voltage source;
(b) an output for a regulated voltage VOUT;
and
(c) an offset error correction circuit that generates an offset correction signal as a function of a load current ILOAD through the LDO regulator circuit, wherein the offset correction signal is provided to the LDO regulator circuit so as to adjust the open-loop gain of the LDO regulator circuit to substantially offset variations in the regulated voltage VOUT due to closed-loop operation of the LDO regulator circuit.

1 more element

A method for maintaining loop stability and good load regulation in a low loop gain low-dropout (LDO) regulator circuit that includes an input configured to receive an unregulated voltage from a voltage source and an output for a regulated voltage VOUT, including:

(a) generating an offset current IOFFSET as a function of a load current ILOAD through the LDO regulator circuit;
and
(b) applying the offset current IOFFSET to an error amplifier having a first differential input and a second differential input controlling the generation of the regulated voltage VOUT, such that the first differential input passes a current reduced by the offset current IOFFSET and the second differential input passes a current increased by the offset current IOFFSET, thereby substantially cancelling out variations in the regulated voltage VOUT that would otherwise occur due to load regulation limitations of the LDO regulator circuit.

Dependencies are inferred from the claim text.

Load regulation for LDO with low loop gain

Life of this patent

Load regulation for LDO with low loop gain

Life of this patent

Abstract

Claims20