Semiconductor package including stiffener
AssigneeSamsung Electronics Co., Ltd.
InventorsJongyoun Kim, Eungkyu Kim, Inhyung Song, Hyeonseok Lee
Life of this patent
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Abstract
A semiconductor package includes a package substrate, a semiconductor stack on the package substrate, a passive device on the package substrate and spaced apart from the semiconductor stack, and a stiffener on the package substrate and extending around an outer side of the semiconductor stack. The stiffener includes a first step surface extends over the passive device. A width of a bottom surface of the stiffener is smaller than a width of a top surface of the stiffener.
Claims20
A semiconductor package comprising:
- a package substrate;
- a semiconductor stack comprising an interposer substrate on the package substrate and semiconductor chips on the interposer substrate;
- a passive device on the package substrate and spaced apart from the semiconductor stack;
- and
- a stiffener on the package substrate, wherein the stiffener extends around an outer side of the semiconductor stack,
- wherein the stiffener comprises:
- at least one vertical or inclined surface;
- an uppermost inner side surface above the at least one vertical or inclined surface, extending to a top surface of the stiffener;
- and
- a first step surface below the at least one vertical or inclined surface, the first step surface extending over the passive device,
- wherein the uppermost inner side surface does not overlap the semiconductor chips in a vertical direction, and
- wherein a width of a bottom surface of the stiffener is smaller than a width of the top surface of the stiffener,
- wherein the stiffener extends over the semiconductor stack without contacting the semiconductor stack.
A semiconductor package comprising:
- a package substrate;
- a semiconductor stack comprising an interposer substrate on the package substrate, semiconductor chips on the interposer substrate, and a mold layer extending around an outer side of the semiconductor chips;
- a passive device on the package substrate and spaced apart from the semiconductor stack;
- a stiffener on the package substrate, wherein the stiffener extends around an outer side of the semiconductor stack;
- and
- a thermal interface material (TIM) between the package substrate and the stiffener,
- wherein the stiffener comprises:
- at least one vertical or inclined surface;
- an uppermost inner side surface above the at least one vertical or inclined surface, extending to a top surface of the stiffener;
- a first step surface below the at least one vertical or inclined surface, the first step surface extending over the passive device;
- and
- a second step surface at a higher level than the first step surface,
- wherein the uppermost inner side surface overlaps the mold layer in a vertical direction, is spaced from the mold layer, and does not overlap the semiconductor chips in the vertical direction,
- wherein a portion of the second step surface overlaps the mold layer in the vertical direction, and is spaced from the mold layer, and
- wherein a width of a bottom surface of the stiffener is smaller than a width of the top surface of the stiffener.
A semiconductor package comprising:
- a package substrate;
- a semiconductor stack comprising an interposer substrate on the package substrate, semiconductor chips on the interposer substrate, and a mold layer extending around an outer side of the semiconductor chips;
- a passive device on the package substrate and spaced apart from the semiconductor stack;
- a stiffener on the package substrate, wherein the stiffener extends around an outer side of the semiconductor stack;
- and
- a thermal interface material (TIM) between the package substrate and the stiffener,
- wherein the stiffener comprises
- at least one vertical or inclined surface comprising an inclined surface directly vertically overlapping the passive device,
- an uppermost inner side surface above the at least one vertical or inclined surface, extending to a top surface of the stiffener,
- wherein the uppermost inner side surface does not overlap the semiconductor chips in a vertical direction upward from a bottom surface of the stiffener, and
- wherein a portion of the stiffener gradually increases in width in the vertical direction,
- wherein the stiffener extends over the mold layer without contacting the mold layer.
Dependencies are inferred from the claim text.