Interconnect line structures with metal chalcogenide cap materials
AssigneeIntel Corporation
InventorsCarl H. Naylor, Christopher Jezewski
Life of this patent
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Abstract
Integrated circuit interconnect structures including an interconnect line metallization feature subjected to one or more chalcogenation techniques to form a cap may reduce line resistance. A top portion of a bulk line material may be advantageously crystallized into a metal chalcogenide cap with exceptionally large crystal structure. Accordingly, chalcogenation of a top portion of a bulk material can lower scattering resistance of an interconnect line relative to alternatives where the bulk material is capped with an alternative material, such as an amorphous dielectric or a fine grained metallic or graphitic material.
Claims12
An integrated circuit (IC) interconnect structure, comprising:
- a via metallization within a dielectric material;
- and
- a line metallization over, and coupled to, the via metallization, wherein the line metallization comprises:
- a bulk material comprising a first metal;
- a liner material between a bottom of the bulk material and the dielectric material and adjacent to a sidewall of the bulk material, the liner material comprising a second metal;
- and
- a cap material over the bulk material, but not over the liner material adjacent to the sidewall of the bulk material, wherein the cap material comprises a first atomic layer of predominantly the first metal in contact with a second atomic layer of predominantly a chalcogen.
Dependencies are inferred from the claim text.