Memory with post-packaging master die selection

A memory system, comprising:

• a memory controller;
• a memory device operably connected to the memory controller, wherein the memory device includes a plurality of memory dies and a package substrate electrically connected to the memory dies of the plurality, wherein each memory die of the plurality of memory dies includes command/address decoders, wherein the command/address decoders are configured (i) to receive command and address signals from external contacts of the memory device at inputs of the command/address decoders and (ii) to, when enabled via master selection circuitry, decode the command and address signals and transmit the decoded command and address signals to other memory dies of the plurality;
• and
• the master selection circuitry configured to enable, or disable, or both the command/address decoders of the plurality of memory dies (a) after the plurality of memory dies is packaged in the memory device and (b) based at least in part on a difference detected between one or more characteristics of at least two memory dies of the plurality of memory dies, wherein the master selection circuitry is at least partially positioned within the package substrate.