Error detection and checking in wireless communication systems
AssigneeInterDigital Patent Holdings, Inc.
InventorKyle Jung-Lin Pan
Life of this patent
Estimating the term…
Abstract
A device capable of operating in a wireless communication environment. The device may be configured to determine a plurality of control signaling bits. The device may determine a plurality of cyclic redundancy check (CRC) bits based on the plurality of control signaling bits. The device may apply a channel coding scheme to the plurality of control signaling bits and the plurality of CRC bits. The plurality of CRC bits may be distributed among the plurality of control signaling bits prior to applying the channel coding scheme. The device may transmit the channel coded plurality of control signaling bits and CRC bits.
Claims20
A wireless transmit receive unit (WTRU) comprising a processor and memory, the processor and memory configured to:
- generate first feedback bits, the first feedback bits comprising a channel quality index (CQI);
- attach first cyclic redundancy check (CRC) bits to the first feedback bits;
- apply a channel coding scheme to the first feedback bits and the first CRC bits;
- generate second feedback bits, the second feedback bits comprising a precoding matrix index (PMI);
- attach second CRC bits to the second feedback bits;
- apply the channel coding scheme to the second feedback bits and the second CRC bits;
- and
- send a transmission comprising the channel-coded first feedback bits and first CRC bits and the channel-coded second feedback bits and second CRC bits.
A method implemented by a wireless transmit receive unit (WTRU), the method comprising:
- generating first feedback bits, the first feedback bits comprising a channel quality index (CQI);
- attaching first cyclic redundancy check (CRC) bits to the first feedback bits;
- applying a channel coding scheme to the first feedback bits and the first CRC bits;
- generating second feedback bits, the second feedback bits comprising a precoding matrix index (PMI);
- attaching second CRC bits to the second feedback bits;
- applying the channel coding scheme to the second feedback bits and the second CRC bits;
- and
- sending a transmission comprising the channel-coded first feedback bits and first CRC bits and the channel-coded second feedback bits and second CRC bits.
A base station comprising a processor and memory, the processor and memory configured to:
- receive a transmission comprising channel-coded first feedback bits and first cyclic redundancy check (CRC) bits and channel-coded second feedback bits and second CRC bits, wherein the channel-coded first feedback bits and first CRC bits correspond to first feedback bits attached with first CRC bits that were jointly channel coded using a channel coding scheme, the first feedback bits comprise a channel quality index (CQI), the channel-coded second feedback bits and second CRC bits correspond to second feedback bits attached with second CRC bits that were jointly channel coded using the channel coding scheme, and the second feedback bits comprise a precoding matrix index PMI.
Dependencies are inferred from the claim text.