Interrupt management
AssigneeNordic Semiconductor ASA
InventorsMartin Olof Olsson, Frode Milch Pedersen
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Abstract
A circuit portion comprises a mapping module, a source component, a destination component and a memory. The mapping module comprises a plurality of channels that each provides a connection for connecting two components of the circuit portion in a one-to-one relationship. The source component is arranged in a first clock or power domain, and the destination component is arranged in a second clock or power domain. In response to an assertion of an event signal or an interrupt by the source component, the mapping module is configured to forward the event signal or interrupt to the destination component via only one channel of the plurality of channels so as to cause the destination component to perform a corresponding task according to a mapping stored in the memory.
Claims20
A circuit portion comprising:
- a mapping module, comprising a plurality of channels wherein each channel provides a connection for connecting a respective first component of the circuit portion with a respective second component of the circuit portion in a one-to-one relationship, wherein the one-to-one relationship is fixed and wherein the mapping module is configured such that the plurality of channels cannot provide a connection in a one-to-many relationship;
- a source component, arranged in a first clock or power domain, configured to assert an event signal or an interrupt from a set of event signals or interrupts;
- a destination component, arranged in a second clock or power domain, configured to execute a task from a set of tasks;
- and
- a memory storing a mapping between the set of event signals or interrupts and the set of tasks;
- wherein the mapping module is configured, in response to an assertion of an event signal or interrupt by the source component, to forward the event signal or interrupt to the destination component via only one channel of the plurality of channels so as to cause the destination component to perform a corresponding task according to the mapping stored in the memory.
A circuit portion for communicating between two peripheral-to-peripheral communication systems the circuit portion comprising:
- a first peripheral-to-peripheral communication system, configured to provide a source peripheral-to-peripheral communication system channel to a first peripheral configured to assert an event signal from a set of event signals;
- a second peripheral-to-peripheral communication system, configured to provide a sink peripheral-to-peripheral communication system channel to a second peripheral configured to perform a set of tasks;
- a first bridging module, connected to the first peripheral-to-peripheral communication system;
- a second bridging module, connected to the second peripheral-to-peripheral communication system;
- and
- a memory storing a mapping between the set of event signals and the set of tasks;
- wherein:
- the first bridging module and the second bridging module are connected by a plurality of bridging channels;
- the first peripheral-to-peripheral communication system is configured, upon receipt of an event signal on the source peripheral-to-peripheral communication system channel, to output the event signal to the first bridging module;
- and
- the first bridging module and the second bridging module is configured, in response to receiving the event signal, to connect the source channel and the sink channel to only one bridging channel of the plurality of bridging channels in a one-to-one relationship according to the mapping stored in the memory, wherein the one-to-one relationship is fixed and wherein the plurality of bridging channels are configured such that the plurality of bridging channels cannot provide a connection in a one-to-many relationship.
Dependencies are inferred from the claim text.