Transistor structure

A method of fabricating a transistor, the method comprising:

• etching a trench in a semiconductor substrate;
• forming an electrically-insulating material on sidewalls and a bottom of the trench leaving an unfilled space in a central portion of the trench;
• filling the unfilled space of the trench with a conductive material;
• removing portions of the electrically-insulating material and the conductive material at locations for a gate and gate insulator of the transistor;
• forming the gate insulator on the sidewalls of the trench at the location for the gate insulator;
• forming the gate adjacent to the gate insulator;
• forming a channel area adjacent the gate by doping of semiconductor substrate;
• and
• forming a first source/drain region and a second source/drain region adjacent the trench so that the trench extends from the first source/drain region to the second source/drain region along a first side of a first drift region of the semiconductor substrate, the first and second source/drain regions being spaced from one another by the channel area, wherein the channel area, the first source/drain region, and the second source/drain region are formed on the same surface side of the semiconductor substrate and delimited by the same wall of the trench on the same surface side of the semiconductor substrate.

A method of fabricating a semiconductor device having a plurality of transistors, the method comprising:

• etching trenches in a semiconductor substrate;
• forming an electrically-insulating material on sidewalls and a bottom of the trenches leaving an unfilled space in a central portion of the trenches;
• filling the unfilled space of the trenches with a conductive material;
• removing portions of the insulating material and the conductive material at locations for gates and gate insulators of the transistors;
• forming a gate insulating material on the sidewalls of the trenches at the locations for the gates and the gate insulators of the transistors;
• forming the gates adjacent the gate insulating material;
• forming source/drain regions adjacent the trenches so that each trench extends from a source region to a drain region, each source region being spaced from an associated drain region by an associated channel area, wherein each of the channel areas and the source/drain regions are formed on the same surface side of the semiconductor substrate and delimited by the same wall of an associated trench on the same surface side of the semiconductor substrate;
• forming a first terminal electrically coupled to the gates;
• forming a second terminal electrically coupled to the source regions;
• and
• forming a third terminal electrically coupled to the drain regions, wherein the plurality of transistors are coupled in parallel.

A method of fabricating a transistor, the method comprising:

• forming a first drift region in a semiconductor substrate;
• forming a first source/drain region and a second source/drain region in the first drift region, the second source/drain region being spaced from the first source/drain region by a channel area, wherein the channel area, the first source/drain region, and the second source/drain region are on the same surface side of the semiconductor substrate;
• forming a buried well that is spaced from the surface side of the semiconductor substrate by the first drift region, wherein a second portion of the first drift region is located between the channel area and the buried well;
• and
• forming a first trench that extends from the first source/drain region to the second source/drain region along a first side of the first drift region and reaches the buried well, wherein a first electrically-conductive element and a gate are located in the first trench, the gate being adjacent the channel area.