Capacitor in a substrate via
AssigneeIntel Corporation
InventorsAslam Haswarey, Anne Augustine, Yan Fen Shen
Life of this patent
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Abstract
Embodiments herein relate to systems, apparatuses, or processes to using vias, or plated through holes (PTH), within a substrate or within a sub laminate to create capacitors. The interior of a via may have a first layer, or coating, of an electrically conductive material such as copper, formed on the sides of the via. A second layer including a dielectric material is placed on the first layer of the electrically conductive material. A third layer of electrically conductive material may then be placed on the second layer of the dielectric material. Other embodiments may be described and/or claimed.
Claims24
A capacitor comprising:
- a substrate with a first side and a second side opposite the first side;
- a via extending from the first side of the substrate to the second side of the substrate;
- a first layer of electrically conductive material on an inside surface of the via, the first layer extending from the first side of the substrate to the second side of the substrate;
- a second layer of dielectric material on the first layer, the second layer extending from the first side of the substrate to the second side of the substrate;
- a third layer of electrically conductive material on the second layer, the third layer extending from the first side of the substrate to the second side of the substrate;
- and
- wherein the first layer and the third layer are electrically isolated from each other, wherein the third layer has an uppermost surface at a same level as an uppermost surface of the first layer, and wherein the third layer has a bottommost surface at a same level as a bottommost surface of the first layer.
A system comprising:
- a substrate having a first side and a second side opposite the first side;
- a die on the first side of the substrate, the die electrically coupled with a capacitor;
- and
- the capacitor that includes:
- a via extending from the first side of the substrate to the second side of the substrate;
- a first layer of electrically conductive material on an inside surface of the via, the first layer extending from the first side of the substrate to the second side of the substrate;
- a second layer of dielectric material on the first layer, the second layer extending from the first side of the substrate to the second side of the substrate;
- a third layer of electrically conductive material on the second layer, the third layer extending from the first side of the substrate to the second side of the substrate;
- and
- wherein the first layer and the third layer are electrically isolated from each other, wherein the third layer has an uppermost surface at a same level as an uppermost surface of the first layer, and wherein the third layer has a bottommost surface at a same level as a bottommost surface of the first layer.
A method comprising:
- providing a substrate;
- forming a via within the substrate from a first side of the substrate to a second side of the substrate opposite the first side;
- forming a first layer of electrically conductive material on an inside surface of the via;
- forming a second layer of dielectric material on the first layer, the second layer extending from the first side of the substrate to the second side of the substrate;
- and
- forming a third layer of electrically conductive material on the second layer, the third layer extending from the first side of the substrate to the second side of the substrate, wherein the first layer and the third layer are electrically isolated from each other, wherein the third layer has an uppermost surface at a same level as an uppermost surface of the first layer, and wherein the third layer has a bottommost surface at a same level as a bottommost surface of the first layer.
Dependencies are inferred from the claim text.