Self-authenticating chips

A non-transitory computer-readable medium comprising logic, which, when executed by an authentication circuit on an integrated circuit interconnected to a comparator, a first memory region, a second memory region and a third memory region, cause the authentication circuit to:

• read a first authentication code from the first memory region;
• read a second authentication code from the second memory region;
• authenticate a card by comparing the first authentication code with the second authentication code;
• and
• responsive to the authenticating, unlock at least one of:
• a communication interface to, thereby, allow data to be transmitted therethrough;
• and
• the third memory region to, thereby, allow data to be read therefrom;
• wherein the second memory region has been adapted to be unreadable and unmodifiable by a chip or by a chip reader and may only be accessed by the authentication circuit to compare the first authentication code to the second authentication code.

A non-transitory computer-readable medium comprising logic, which, when executed by an authentication circuit on an integrated circuit interconnected to a comparator, a first memory region and a second memory region, cause the authentication circuit to:

• read the first authentication code from said first memory region;
• present the first authentication code to the comparator;
• receive, from the comparator, an indicator indicating that the first authentication code matches a second authentication code stored in the second memory region, wherein the second authentication code cannot be extracted or modified by the integrated circuit or a chip reader and may only be accessed by the comparator to compare a given input, to the comparator, to the second authentication code;
• and
• unlock, in response to the receiving the indicator:
• a communication interface of the chip to allow data to be transmitted, through the communication interface, to a chip reader;
• or
• a third memory region of the integrated circuit.