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US 12,519,730 B2Granted
Dynamic memory bandwidth shaping
AssigneeNVIDIA Corporation
InventorsAshutosh Pandey, Jay Kishora Gupta, Anurag Chaudhary, Steven E Molnar, John Kelley
Life of this patent
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Abstract
Bandwidth shaping mechanisms in a memory hierarchy operate a first bandwidth shaper on a first memory, such as a cache memory, to shape bandwidth to a second memory, such as a Dynamic Random Access Memory, and replenish the first bandwidth shaper from a second bandwidth shaper based on a hit bandwidth on the first memory.
Claims20
A process comprising:
- operating a first bandwidth shaper on a first memory to shape bandwidth to a second memory;
- and
- replenishing the first bandwidth shaper from a second bandwidth shaper based on a hit bandwidth on the first memory.
A memory system comprising:
- a first memory and a second memory;
- the first memory configured as a cache for the second memory;
- a first bandwidth shaper configured to shape bandwidth for the second memory;
- a second bandwidth shaper configured to track hit bandwidth on the first memory;
- and
- the second bandwidth shaper configured to provide replenishments of bandwidth to the second memory to the first bandwidth shaper based on the hit bandwidth.
3 more elements
A system comprising:
- an upper memory of a memory hierarchy;
- a lower memory of the memory hierarchy;
- a bandwidth shaper comprising:
- an accumulator for bandwidth credit for a traffic class to access the lower memory;
- logic configured to:
- increment the accumulator at a rate based on a cycle time of the upper memory;
- decrement the accumulator by a set amount in response to a grant of bandwidth for the traffic class to the upper memory;
- apply a lower memory bandwidth replenishment signal for the traffic class to the accumulator, the replenishment signal based on a hit bandwidth of the traffic class on the upper memory;
- and
- generate, based on a value of the accumulator, a mask setting for the traffic class in a bandwidth arbiter of the upper memory.
7 more elements
A system comprising:
- an upper memory of a memory hierarchy;
- a lower memory of the memory hierarchy;
- a bandwidth shaper comprising:
- an accumulator for hit bandwidth credit for a traffic class on the upper memory;
- logic configured to:
- increment the accumulator at a rate based on a cycle time of the upper memory;
- decrement the accumulator in response to a hit on the upper memory by the traffic class;
- and
- in response to the hit on the memory by the traffic class, and on condition that the accumulator has not reached a value indicating a violation of a configured limit on the hit bandwidth for the traffic class, generate a replenishment signal for the traffic class to a bandwidth shaper of traffic between the upper memory and the lower memory.
6 more elements
Dependencies are inferred from the claim text.